[Qemu-devel] Re: patch: (attempt to) emulate 440BX/PIIX4

[Andriy Gapon <avg@icyb.net.ua>]

[-- Attachment #1: Type: text/plain, Size: 636 bytes --]

on 17/03/2009 17:58 Andriy Gapon said the following:
> With the attached patches to qemu (against 0.10.0 release) and bochs bios (against
> latest from git plus qemu patches on top), I was able to boot win2k image that was
> transfered from physical system with 440BX/PIIX4E hardware (MS-6163 motherboard).
> 
> The patches are unconditional, but it won't be too hard to put the differences
> under compile-time condition.
> 
> Apparently qemu already emulates enough of 440BX/PIIX4 sufficiently well - I
> didn't have any blue screens or other issues so far.

Sorry, I sent the bios patch with some debugging cruft.


-- 
Andriy Gapon

[-- Attachment #2: bios-piix4.patch --]
[-- Type: text/plain, Size: 2311 bytes --]

diff --git a/bios/rombios.c b/bios/rombios.c
index 0f13b53..b04426c 100644
--- a/bios/rombios.c
+++ b/bios/rombios.c
@@ -202,7 +202,7 @@
 // define this if you want to make PCIBIOS working on a specific bridge only
 // undef enables PCIBIOS when at least one PCI device is found
 // i440FX is emulated by Bochs and QEMU
-#define PCI_FIXED_HOST_BRIDGE 0x12378086 ;; i440FX PCI bridge
+#define PCI_FIXED_HOST_BRIDGE 0x71908086 ;; i440FX PCI bridge
 
 // #20  is dec 20
 // #$20 is hex 20 = 32
@@ -9688,17 +9688,17 @@ pci_routing_table_structure:
   db 0, 1 ;; version
   dw 32 + (6 * 16) ;; table size
   db 0 ;; PCI interrupt router bus
-  db 0x08 ;; PCI interrupt router DevFunc
+  db 0x38 ;; PCI interrupt router DevFunc
   dw 0x0000 ;; PCI exclusive IRQs
   dw 0x8086 ;; compatible PCI interrupt router vendor ID
-  dw 0x122e ;; compatible PCI interrupt router device ID
+  dw 0x7000 ;; compatible PCI interrupt router device ID
   dw 0,0 ;; Miniport data
   db 0,0,0,0,0,0,0,0,0,0,0 ;; reserved
-  db 0x37 ;; checksum
+  db 0xA7 ;; checksum
 pci_routing_table_structure_start:
   ;; first slot entry PCI-to-ISA (embedded)
   db 0 ;; pci bus number
-  db 0x08 ;; pci device number (bit 7-3)
+  db 0x38 ;; pci device number (bit 7-3)
   db 0x60 ;; link value INTA#: pointer into PCI2ISA config space
   dw 0xdef8 ;; IRQ bitmap INTA#
   db 0x61 ;; link value INTB#
diff --git a/bios/rombios32.c b/bios/rombios32.c
index 7be4216..2bd902b 100644
--- a/bios/rombios32.c
+++ b/bios/rombios32.c
@@ -682,6 +682,7 @@ void smp_probe(void)
 
 #define PCI_VENDOR_ID_INTEL             0x8086
 #define PCI_DEVICE_ID_INTEL_82441       0x1237
+#define PCI_DEVICE_ID_INTEL_82443       0x7190
 #define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
 #define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
 #define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
@@ -850,7 +851,7 @@ static void pci_bios_init_bridges(PCIDevice *d)
         outb(0x4d1, elcr[1]);
         BX_INFO("PIIX3/PIIX4 init: elcr=%02x %02x\n",
                 elcr[0], elcr[1]);
-    } else if (vendor_id == PCI_VENDOR_ID_INTEL && device_id == PCI_DEVICE_ID_INTEL_82441) {
+    } else if (vendor_id == PCI_VENDOR_ID_INTEL && (device_id == PCI_DEVICE_ID_INTEL_82441 || device_id == PCI_DEVICE_ID_INTEL_82443)) {
         /* i440 PCI bridge */
         bios_shadow_init(d);
     }

[-- Attachment #3: qemu-piix4.patch --]
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--- hw/pc.c.orig	2009-03-04 22:54:45.000000000 +0000
+++ hw/pc.c	2009-03-17 07:47:58.120091474 +0000
@@ -938,7 +941,7 @@
 
     if (pci_enabled) {
         pci_bus = i440fx_init(&i440fx_state, i8259);
-        piix3_devfn = piix3_init(pci_bus, -1);
+        piix3_devfn = piix4_init(pci_bus, 7 << 3);
     } else {
         pci_bus = NULL;
     }
@@ -1031,7 +1034,7 @@
     }
 
     if (pci_enabled) {
-        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
+        pci_piix4_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
     } else {
         for(i = 0; i < MAX_IDE_BUS; i++) {
             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
@@ -1057,7 +1060,7 @@
     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
 
     if (pci_enabled && usb_enabled) {
-        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
+        usb_uhci_piix4_init(pci_bus, piix3_devfn + 2);
     }
 
     if (pci_enabled && acpi_enabled) {
--- hw/pci.h.orig	2009-03-17 15:45:59.809589980 +0000
+++ hw/pci.h	2009-03-17 15:46:27.931350921 +0000
@@ -104,6 +104,7 @@
 
 #define PCI_VENDOR_ID_INTEL              0x8086
 #define PCI_DEVICE_ID_INTEL_82441        0x1237
+#define PCI_DEVICE_ID_INTEL_82443        0x7190
 #define PCI_DEVICE_ID_INTEL_82801AA_5    0x2415
 #define PCI_DEVICE_ID_INTEL_82371SB_0    0x7000
 #define PCI_DEVICE_ID_INTEL_82371SB_1    0x7010
--- hw/piix_pci.c.orig	2009-03-04 22:54:45.000000000 +0000
+++ hw/piix_pci.c	2009-03-17 15:45:35.327745232 +0000
@@ -193,7 +193,7 @@
                             NULL, i440fx_write_config);
 
     pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL);
-    pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441);
+    pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82443);
     d->config[0x08] = 0x02; // revision
     pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
     d->config[0x0e] = 0x00; // header_type