[v2 0/2] drm/i915/display: Implement Display Wa

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* [v2 0/2] drm/i915/display: Implement Display Wa_16030862157
@ 2026-07-15 10:41 Uma Shankar
  2026-07-15 10:29 ` ✓ CI.KUnit: success for " Patchwork
                   ` (6 more replies)
  0 siblings, 7 replies; 10+ messages in thread
From: Uma Shankar @ 2026-07-15 10:41 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: vinod.govindapillai, suraj.kandpal, Uma Shankar

Interpret 0xF populated-channel count as 16. For 16-channel
configuration, BIOS programs 1111b. A programmed value of 1111b
must be interpreted as 16 channels for memory bandwidth calculations.
This series implements the workaround in driver.

Uma Shankar (2):
  drm/i915/display: Add Wa_16030862157 to the display workaround list
  drm/i915/dram: Interpret 0xF populated-channel count as 16

 drivers/gpu/drm/i915/display/intel_bw.c       | 20 ++++++++++++++++---
 .../gpu/drm/i915/display/intel_display_wa.c   |  2 ++
 .../gpu/drm/i915/display/intel_display_wa.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dram.c     | 12 +++++++++++
 4 files changed, 32 insertions(+), 3 deletions(-)

-- 
2.50.1


^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for drm/i915/display: Implement Display Wa_16030862157
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
@ 2026-07-15 10:29 ` Patchwork
  2026-07-15 10:41 ` [v2 1/2] drm/i915/display: Add Wa_16030862157 to the display workaround list Uma Shankar
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 10:29 UTC (permalink / raw)
  To: Uma Shankar; +Cc: intel-xe

== Series Details ==

Series: drm/i915/display: Implement Display Wa_16030862157
URL   : https://patchwork.freedesktop.org/series/170472/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:28:07] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:28:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:28:43] Starting KUnit Kernel (1/1)...
[10:28:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:28:43] ================== guc_buf (11 subtests) ===================
[10:28:43] [PASSED] test_smallest
[10:28:43] [PASSED] test_largest
[10:28:43] [PASSED] test_granular
[10:28:43] [PASSED] test_unique
[10:28:43] [PASSED] test_overlap
[10:28:43] [PASSED] test_reusable
[10:28:43] [PASSED] test_too_big
[10:28:43] [PASSED] test_flush
[10:28:43] [PASSED] test_lookup
[10:28:43] [PASSED] test_data
[10:28:43] [PASSED] test_class
[10:28:43] ===================== [PASSED] guc_buf =====================
[10:28:43] =================== guc_dbm (7 subtests) ===================
[10:28:43] [PASSED] test_empty
[10:28:43] [PASSED] test_default
[10:28:43] ======================== test_size  ========================
[10:28:43] [PASSED] 4
[10:28:43] [PASSED] 8
[10:28:43] [PASSED] 32
[10:28:43] [PASSED] 256
[10:28:43] ==================== [PASSED] test_size ====================
[10:28:43] ======================= test_reuse  ========================
[10:28:43] [PASSED] 4
[10:28:43] [PASSED] 8
[10:28:43] [PASSED] 32
[10:28:43] [PASSED] 256
[10:28:43] =================== [PASSED] test_reuse ====================
[10:28:43] =================== test_range_overlap  ====================
[10:28:43] [PASSED] 4
[10:28:43] [PASSED] 8
[10:28:43] [PASSED] 32
[10:28:43] [PASSED] 256
[10:28:43] =============== [PASSED] test_range_overlap ================
[10:28:43] =================== test_range_compact  ====================
[10:28:43] [PASSED] 4
[10:28:43] [PASSED] 8
[10:28:43] [PASSED] 32
[10:28:43] [PASSED] 256
[10:28:43] =============== [PASSED] test_range_compact ================
[10:28:43] ==================== test_range_spare  =====================
[10:28:43] [PASSED] 4
[10:28:43] [PASSED] 8
[10:28:43] [PASSED] 32
[10:28:43] [PASSED] 256
[10:28:43] ================ [PASSED] test_range_spare =================
[10:28:43] ===================== [PASSED] guc_dbm =====================
[10:28:43] =================== guc_idm (6 subtests) ===================
[10:28:43] [PASSED] bad_init
[10:28:43] [PASSED] no_init
[10:28:43] [PASSED] init_fini
[10:28:43] [PASSED] check_used
[10:28:43] [PASSED] check_quota
[10:28:43] [PASSED] check_all
[10:28:43] ===================== [PASSED] guc_idm =====================
[10:28:43] =============== guc_klv_helpers (9 subtests) ===============
[10:28:43] [PASSED] test_count
[10:28:43] [PASSED] test_encode_u32
[10:28:43] [PASSED] test_encode_u64
[10:28:43] [PASSED] test_encode_string
[10:28:43] [PASSED] test_encode_object_raw
[10:28:43] [PASSED] test_encode_object_klv
[10:28:43] [PASSED] test_encode_object_nested
[10:28:43] [PASSED] test_encode_object_basic
[10:28:43] [PASSED] test_print
[10:28:43] ================= [PASSED] guc_klv_helpers =================
[10:28:43] ================== no_relay (3 subtests) ===================
[10:28:43] [PASSED] xe_drops_guc2pf_if_not_ready
[10:28:43] [PASSED] xe_drops_guc2vf_if_not_ready
[10:28:43] [PASSED] xe_rejects_send_if_not_ready
[10:28:43] ==================== [PASSED] no_relay =====================
[10:28:43] ================== pf_relay (14 subtests) ==================
[10:28:43] [PASSED] pf_rejects_guc2pf_too_short
[10:28:43] [PASSED] pf_rejects_guc2pf_too_long
[10:28:43] [PASSED] pf_rejects_guc2pf_no_payload
[10:28:43] [PASSED] pf_fails_no_payload
[10:28:43] [PASSED] pf_fails_bad_origin
[10:28:43] [PASSED] pf_fails_bad_type
[10:28:43] [PASSED] pf_txn_reports_error
[10:28:43] [PASSED] pf_txn_sends_pf2guc
[10:28:43] [PASSED] pf_sends_pf2guc
[10:28:43] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:28:43] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:28:43] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:28:43] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:28:43] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[10:28:43] ==================== [PASSED] pf_relay =====================
[10:28:43] ================== vf_relay (3 subtests) ===================
[10:28:43] [PASSED] vf_rejects_guc2vf_too_short
[10:28:43] [PASSED] vf_rejects_guc2vf_too_long
[10:28:43] [PASSED] vf_rejects_guc2vf_no_payload
[10:28:43] ==================== [PASSED] vf_relay =====================
[10:28:43] ================ pf_gt_config (9 subtests) =================
[10:28:43] [PASSED] fair_contexts_1vf
[10:28:43] [PASSED] fair_doorbells_1vf
[10:28:43] [PASSED] fair_ggtt_1vf
[10:28:43] ====================== fair_vram_1vf  ======================
[10:28:43] [PASSED] 3.50 GiB
[10:28:43] [PASSED] 11.5 GiB
[10:28:43] [PASSED] 15.5 GiB
[10:28:43] [PASSED] 31.5 GiB
[10:28:43] [PASSED] 63.5 GiB
[10:28:43] [PASSED] 1.91 GiB
[10:28:43] ================== [PASSED] fair_vram_1vf ==================
[10:28:43] ================ fair_vram_1vf_admin_only  =================
[10:28:43] [PASSED] 3.50 GiB
[10:28:43] [PASSED] 11.5 GiB
[10:28:43] [PASSED] 15.5 GiB
[10:28:43] [PASSED] 31.5 GiB
[10:28:43] [PASSED] 63.5 GiB
[10:28:43] [PASSED] 1.91 GiB
[10:28:43] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:28:43] ====================== fair_contexts  ======================
[10:28:43] [PASSED] 1 VF
[10:28:43] [PASSED] 2 VFs
[10:28:43] [PASSED] 3 VFs
[10:28:43] [PASSED] 4 VFs
[10:28:43] [PASSED] 5 VFs
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[10:28:43] [PASSED] 47 VFs
[10:28:43] [PASSED] 48 VFs
[10:28:43] [PASSED] 49 VFs
[10:28:43] [PASSED] 50 VFs
[10:28:43] [PASSED] 51 VFs
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[10:28:43] [PASSED] 53 VFs
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[10:28:43] [PASSED] 60 VFs
[10:28:43] [PASSED] 61 VFs
[10:28:43] [PASSED] 62 VFs
[10:28:43] [PASSED] 63 VFs
[10:28:43] ================== [PASSED] fair_contexts ==================
[10:28:43] ===================== fair_doorbells  ======================
[10:28:43] [PASSED] 1 VF
[10:28:43] [PASSED] 2 VFs
[10:28:43] [PASSED] 3 VFs
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[10:28:43] [PASSED] 48 VFs
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[10:28:43] [PASSED] 51 VFs
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[10:28:43] [PASSED] 53 VFs
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[10:28:43] [PASSED] 57 VFs
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[10:28:43] [PASSED] 60 VFs
[10:28:43] [PASSED] 61 VFs
[10:28:43] [PASSED] 62 VFs
[10:28:43] [PASSED] 63 VFs
[10:28:43] ================= [PASSED] fair_doorbells ==================
[10:28:43] ======================== fair_ggtt  ========================
[10:28:43] [PASSED] 1 VF
[10:28:43] [PASSED] 2 VFs
[10:28:43] [PASSED] 3 VFs
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[10:28:43] [PASSED] 40 VFs
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[10:28:43] [PASSED] 45 VFs
[10:28:43] [PASSED] 46 VFs
[10:28:43] [PASSED] 47 VFs
[10:28:43] [PASSED] 48 VFs
[10:28:43] [PASSED] 49 VFs
[10:28:43] [PASSED] 50 VFs
[10:28:43] [PASSED] 51 VFs
[10:28:43] [PASSED] 52 VFs
[10:28:43] [PASSED] 53 VFs
[10:28:43] [PASSED] 54 VFs
[10:28:43] [PASSED] 55 VFs
[10:28:43] [PASSED] 56 VFs
[10:28:43] [PASSED] 57 VFs
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[10:28:43] [PASSED] 60 VFs
[10:28:43] [PASSED] 61 VFs
[10:28:43] [PASSED] 62 VFs
[10:28:43] [PASSED] 63 VFs
[10:28:43] ==================== [PASSED] fair_ggtt ====================
[10:28:43] ======================== fair_vram  ========================
[10:28:43] [PASSED] 1 VF
[10:28:43] [PASSED] 2 VFs
[10:28:43] [PASSED] 3 VFs
[10:28:43] [PASSED] 4 VFs
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[10:28:43] [PASSED] 33 VFs
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[10:28:43] [PASSED] 37 VFs
[10:28:43] [PASSED] 38 VFs
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[10:28:43] [PASSED] 40 VFs
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[10:28:43] [PASSED] 48 VFs
[10:28:43] [PASSED] 49 VFs
[10:28:43] [PASSED] 50 VFs
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[10:28:43] [PASSED] 53 VFs
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[10:28:43] [PASSED] 60 VFs
[10:28:43] [PASSED] 61 VFs
[10:28:43] [PASSED] 62 VFs
[10:28:43] [PASSED] 63 VFs
[10:28:43] ==================== [PASSED] fair_vram ====================
[10:28:43] ================== [PASSED] pf_gt_config ===================
[10:28:43] ===================== lmtt (1 subtest) =====================
[10:28:43] ======================== test_ops  =========================
[10:28:43] [PASSED] 2-level
[10:28:43] [PASSED] multi-level
[10:28:43] ==================== [PASSED] test_ops =====================
[10:28:43] ====================== [PASSED] lmtt =======================
[10:28:43] ================= sriov_packet (1 subtest) =================
[10:28:43] [PASSED] test_descriptor_init
[10:28:43] ================== [PASSED] sriov_packet ===================
[10:28:43] ================= pf_service (11 subtests) =================
[10:28:43] [PASSED] pf_negotiate_any
[10:28:43] [PASSED] pf_negotiate_base_match
[10:28:43] [PASSED] pf_negotiate_base_newer
[10:28:43] [PASSED] pf_negotiate_base_next
[10:28:43] [SKIPPED] pf_negotiate_base_older (no older minor)
[10:28:43] [PASSED] pf_negotiate_base_prev
[10:28:43] [PASSED] pf_negotiate_latest_match
[10:28:43] [PASSED] pf_negotiate_latest_newer
[10:28:43] [PASSED] pf_negotiate_latest_next
[10:28:43] [SKIPPED] pf_negotiate_latest_older (no older minor)
[10:28:43] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[10:28:43] =================== [PASSED] pf_service ====================
[10:28:43] ================= xe_guc_g2g (2 subtests) ==================
[10:28:43] ============== xe_live_guc_g2g_kunit_default  ==============
[10:28:43] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:28:43] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:28:43] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:28:43] =================== [SKIPPED] xe_guc_g2g ===================
[10:28:43] =================== xe_mocs (2 subtests) ===================
[10:28:43] ================ xe_live_mocs_kernel_kunit  ================
[10:28:43] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:28:43] ================ xe_live_mocs_reset_kunit  =================
[10:28:43] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:28:43] ==================== [SKIPPED] xe_mocs =====================
[10:28:43] ================= xe_migrate (2 subtests) ==================
[10:28:43] ================= xe_migrate_sanity_kunit  =================
[10:28:43] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:28:43] ================== xe_validate_ccs_kunit  ==================
[10:28:43] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:28:43] =================== [SKIPPED] xe_migrate ===================
[10:28:43] ================== xe_dma_buf (1 subtest) ==================
[10:28:43] ==================== xe_dma_buf_kunit  =====================
[10:28:43] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:28:43] =================== [SKIPPED] xe_dma_buf ===================
[10:28:43] ================= xe_bo_shrink (1 subtest) =================
[10:28:43] =================== xe_bo_shrink_kunit  ====================
[10:28:43] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:28:43] ================== [SKIPPED] xe_bo_shrink ==================
[10:28:43] ==================== xe_bo (2 subtests) ====================
[10:28:43] ================== xe_ccs_migrate_kunit  ===================
[10:28:43] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:28:43] ==================== xe_bo_evict_kunit  ====================
[10:28:43] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:28:43] ===================== [SKIPPED] xe_bo ======================
[10:28:43] ==================== args (13 subtests) ====================
[10:28:43] [PASSED] count_args_test
[10:28:43] [PASSED] call_args_example
[10:28:43] [PASSED] call_args_test
[10:28:43] [PASSED] drop_first_arg_example
[10:28:43] [PASSED] drop_first_arg_test
[10:28:43] [PASSED] first_arg_example
[10:28:43] [PASSED] first_arg_test
[10:28:43] [PASSED] last_arg_example
[10:28:43] [PASSED] last_arg_test
[10:28:43] [PASSED] pick_arg_example
[10:28:43] [PASSED] if_args_example
[10:28:43] [PASSED] if_args_test
[10:28:43] [PASSED] sep_comma_example
[10:28:43] ====================== [PASSED] args =======================
[10:28:43] =================== xe_pci (3 subtests) ====================
[10:28:43] ==================== check_graphics_ip  ====================
[10:28:43] [PASSED] 12.00 Xe_LP
[10:28:43] [PASSED] 12.10 Xe_LP+
[10:28:43] [PASSED] 12.55 Xe_HPG
[10:28:43] [PASSED] 12.60 Xe_HPC
[10:28:43] [PASSED] 12.70 Xe_LPG
[10:28:43] [PASSED] 12.71 Xe_LPG
[10:28:43] [PASSED] 12.74 Xe_LPG+
[10:28:43] [PASSED] 20.01 Xe2_HPG
[10:28:43] [PASSED] 20.02 Xe2_HPG
[10:28:43] [PASSED] 20.04 Xe2_LPG
[10:28:43] [PASSED] 30.00 Xe3_LPG
[10:28:43] [PASSED] 30.01 Xe3_LPG
[10:28:43] [PASSED] 30.03 Xe3_LPG
[10:28:43] [PASSED] 30.04 Xe3_LPG
[10:28:43] [PASSED] 30.05 Xe3_LPG
[10:28:43] [PASSED] 35.10 Xe3p_LPG
[10:28:43] [PASSED] 35.11 Xe3p_XPC
[10:28:43] ================ [PASSED] check_graphics_ip ================
[10:28:43] ===================== check_media_ip  ======================
[10:28:43] [PASSED] 12.00 Xe_M
[10:28:43] [PASSED] 12.55 Xe_HPM
[10:28:43] [PASSED] 13.00 Xe_LPM+
[10:28:43] [PASSED] 13.01 Xe2_HPM
[10:28:43] [PASSED] 20.00 Xe2_LPM
[10:28:43] [PASSED] 30.00 Xe3_LPM
[10:28:43] [PASSED] 30.02 Xe3_LPM
[10:28:43] [PASSED] 35.00 Xe3p_LPM
[10:28:43] [PASSED] 35.03 Xe3p_HPM
[10:28:43] ================= [PASSED] check_media_ip ==================
[10:28:43] =================== check_platform_desc  ===================
[10:28:43] [PASSED] 0x9A60 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A68 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A70 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A40 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A49 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A59 (TIGERLAKE)
[10:28:43] [PASSED] 0x9A78 (TIGERLAKE)
[10:28:43] [PASSED] 0x9AC0 (TIGERLAKE)
[10:28:43] [PASSED] 0x9AC9 (TIGERLAKE)
[10:28:43] [PASSED] 0x9AD9 (TIGERLAKE)
[10:28:43] [PASSED] 0x9AF8 (TIGERLAKE)
[10:28:43] [PASSED] 0x4C80 (ROCKETLAKE)
[10:28:43] [PASSED] 0x4C8A (ROCKETLAKE)
[10:28:43] [PASSED] 0x4C8B (ROCKETLAKE)
[10:28:43] [PASSED] 0x4C8C (ROCKETLAKE)
[10:28:43] [PASSED] 0x4C90 (ROCKETLAKE)
[10:28:43] [PASSED] 0x4C9A (ROCKETLAKE)
[10:28:43] [PASSED] 0x4680 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4682 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4688 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x468A (ALDERLAKE_S)
[10:28:43] [PASSED] 0x468B (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4690 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4692 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4693 (ALDERLAKE_S)
[10:28:43] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46AA (ALDERLAKE_P)
[10:28:43] [PASSED] 0x462A (ALDERLAKE_P)
[10:28:43] [PASSED] 0x4626 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x4628 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:28:43] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:28:43] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:28:43] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:28:43] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:28:43] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:28:43] [PASSED] 0xA721 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA720 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:28:43] [PASSED] 0xA780 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA781 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA782 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA783 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA788 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA789 (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA78A (ALDERLAKE_S)
[10:28:43] [PASSED] 0xA78B (ALDERLAKE_S)
[10:28:43] [PASSED] 0x4905 (DG1)
[10:28:43] [PASSED] 0x4906 (DG1)
[10:28:43] [PASSED] 0x4907 (DG1)
[10:28:43] [PASSED] 0x4908 (DG1)
[10:28:43] [PASSED] 0x4909 (DG1)
[10:28:43] [PASSED] 0x56C0 (DG2)
[10:28:43] [PASSED] 0x56C2 (DG2)
[10:28:43] [PASSED] 0x56C1 (DG2)
[10:28:43] [PASSED] 0x7D51 (METEORLAKE)
[10:28:43] [PASSED] 0x7DD1 (METEORLAKE)
[10:28:43] [PASSED] 0x7D41 (METEORLAKE)
[10:28:43] [PASSED] 0x7D67 (METEORLAKE)
[10:28:43] [PASSED] 0xB640 (METEORLAKE)
[10:28:43] [PASSED] 0x56A0 (DG2)
[10:28:43] [PASSED] 0x56A1 (DG2)
[10:28:43] [PASSED] 0x56A2 (DG2)
[10:28:43] [PASSED] 0x56BE (DG2)
[10:28:43] [PASSED] 0x56BF (DG2)
[10:28:43] [PASSED] 0x5690 (DG2)
[10:28:43] [PASSED] 0x5691 (DG2)
[10:28:43] [PASSED] 0x5692 (DG2)
[10:28:43] [PASSED] 0x56A5 (DG2)
[10:28:43] [PASSED] 0x56A6 (DG2)
[10:28:43] [PASSED] 0x56B0 (DG2)
[10:28:43] [PASSED] 0x56B1 (DG2)
[10:28:43] [PASSED] 0x56BA (DG2)
[10:28:43] [PASSED] 0x56BB (DG2)
[10:28:43] [PASSED] 0x56BC (DG2)
[10:28:43] [PASSED] 0x56BD (DG2)
[10:28:43] [PASSED] 0x5693 (DG2)
[10:28:43] [PASSED] 0x5694 (DG2)
[10:28:43] [PASSED] 0x5695 (DG2)
[10:28:43] [PASSED] 0x56A3 (DG2)
[10:28:43] [PASSED] 0x56A4 (DG2)
[10:28:43] [PASSED] 0x56B2 (DG2)
[10:28:43] [PASSED] 0x56B3 (DG2)
[10:28:43] [PASSED] 0x5696 (DG2)
[10:28:43] [PASSED] 0x5697 (DG2)
[10:28:43] [PASSED] 0xB69 (PVC)
[10:28:43] [PASSED] 0xB6E (PVC)
[10:28:43] [PASSED] 0xBD4 (PVC)
[10:28:43] [PASSED] 0xBD5 (PVC)
[10:28:43] [PASSED] 0xBD6 (PVC)
[10:28:43] [PASSED] 0xBD7 (PVC)
[10:28:43] [PASSED] 0xBD8 (PVC)
[10:28:43] [PASSED] 0xBD9 (PVC)
[10:28:43] [PASSED] 0xBDA (PVC)
[10:28:43] [PASSED] 0xBDB (PVC)
[10:28:43] [PASSED] 0xBE0 (PVC)
[10:28:43] [PASSED] 0xBE1 (PVC)
[10:28:43] [PASSED] 0xBE5 (PVC)
[10:28:43] [PASSED] 0x7D40 (METEORLAKE)
[10:28:43] [PASSED] 0x7D45 (METEORLAKE)
[10:28:43] [PASSED] 0x7D55 (METEORLAKE)
[10:28:43] [PASSED] 0x7D60 (METEORLAKE)
[10:28:43] [PASSED] 0x7DD5 (METEORLAKE)
[10:28:43] [PASSED] 0x6420 (LUNARLAKE)
[10:28:43] [PASSED] 0x64A0 (LUNARLAKE)
[10:28:43] [PASSED] 0x64B0 (LUNARLAKE)
[10:28:43] [PASSED] 0xE202 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE209 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE20B (BATTLEMAGE)
[10:28:43] [PASSED] 0xE20C (BATTLEMAGE)
[10:28:43] [PASSED] 0xE20D (BATTLEMAGE)
[10:28:43] [PASSED] 0xE210 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE211 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE212 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE216 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE220 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE221 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE222 (BATTLEMAGE)
[10:28:43] [PASSED] 0xE223 (BATTLEMAGE)
[10:28:43] [PASSED] 0xB080 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB081 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB082 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB083 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB084 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB085 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB086 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB087 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB08F (PANTHERLAKE)
[10:28:43] [PASSED] 0xB090 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:28:43] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:28:43] [PASSED] 0xFD80 (PANTHERLAKE)
[10:28:43] [PASSED] 0xFD81 (PANTHERLAKE)
[10:28:43] [PASSED] 0xD740 (NOVALAKE_S)
[10:28:43] [PASSED] 0xD741 (NOVALAKE_S)
[10:28:43] [PASSED] 0xD742 (NOVALAKE_S)
[10:28:43] [PASSED] 0xD743 (NOVALAKE_S)
[10:28:43] [PASSED] 0xD745 (NOVALAKE_S)
[10:28:43] [PASSED] 0xD74A (NOVALAKE_S)
[10:28:43] [PASSED] 0xD74B (NOVALAKE_S)
[10:28:43] [PASSED] 0x674C (CRESCENTISLAND)
[10:28:43] [PASSED] 0x674D (CRESCENTISLAND)
[10:28:43] [PASSED] 0x674E (CRESCENTISLAND)
[10:28:43] [PASSED] 0x674F (CRESCENTISLAND)
[10:28:43] [PASSED] 0x6750 (CRESCENTISLAND)
[10:28:43] [PASSED] 0xD750 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD751 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD752 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD753 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD754 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD755 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD756 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD757 (NOVALAKE_P)
[10:28:43] [PASSED] 0xD75F (NOVALAKE_P)
[10:28:43] =============== [PASSED] check_platform_desc ===============
[10:28:43] ===================== [PASSED] xe_pci ======================
[10:28:43] ============= xe_rtp_tables_test (5 subtests) ==============
[10:28:43] ================== xe_rtp_table_gt_test  ===================
[10:28:43] [PASSED] gt_was/14011060649
[10:28:43] [PASSED] gt_was/14011059788
[10:28:43] [PASSED] gt_was/14015795083
[10:28:43] [PASSED] gt_was/16021867713
[10:28:43] [PASSED] gt_was/14019449301
[10:28:43] [PASSED] gt_was/16028005424
[10:28:43] [PASSED] gt_was/14026578760
[10:28:43] [PASSED] gt_was/1409420604
[10:28:43] [PASSED] gt_was/1408615072
[10:28:43] [PASSED] gt_was/22010523718
[10:28:43] [PASSED] gt_was/14011006942
[10:28:43] [PASSED] gt_was/14014830051
[10:28:43] [PASSED] gt_was/18018781329
[10:28:43] [PASSED] gt_was/1509235366
[10:28:43] [PASSED] gt_was/18018781329
[10:28:43] [PASSED] gt_was/16016694945
[10:28:43] [PASSED] gt_was/14018575942
[10:28:43] [PASSED] gt_was/22016670082
[10:28:43] [PASSED] gt_was/22016670082
[10:28:43] [PASSED] gt_was/14017421178
[10:28:43] [PASSED] gt_was/16025250150
[10:28:43] [PASSED] gt_was/14021871409
[10:28:43] [PASSED] gt_was/16021865536
[10:28:43] [PASSED] gt_was/14021486841
[10:28:43] [PASSED] gt_was/14025160223
[10:28:43] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[10:28:43] [PASSED] gt_was/14025635424
[10:28:43] [PASSED] gt_was/16028005424
[10:28:43] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:28:43] ================== xe_rtp_table_gt_test  ===================
[10:28:43] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[10:28:43] [PASSED] gt_tunings/Tuning: 32B Access Enable
[10:28:43] [PASSED] gt_tunings/Tuning: L3 cache
[10:28:43] [PASSED] gt_tunings/Tuning: L3 cache - media
[10:28:43] [PASSED] gt_tunings/Tuning: Compression Overfetch
[10:28:43] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[10:28:43] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[10:28:43] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[10:28:43] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[10:28:43] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[10:28:43] [PASSED] gt_tunings/Tuning: Stateless compression control
[10:28:43] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[10:28:43] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[10:28:43] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[10:28:43] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[10:28:43] ============== [PASSED] xe_rtp_table_gt_test ===============
[10:28:43] ================== xe_rtp_table_oob_test  ==================
[10:28:43] [PASSED] oob_was/1607983814
[10:28:43] [PASSED] oob_was/16010904313
[10:28:43] [PASSED] oob_was/18022495364
[10:28:43] [PASSED] oob_was/22012773006
[10:28:43] [PASSED] oob_was/14014475959
[10:28:43] [PASSED] oob_was/22011391025
[10:28:43] [PASSED] oob_was/22012727170
[10:28:43] [PASSED] oob_was/22012727685
[10:28:43] [PASSED] oob_was/22016596838
[10:28:43] [PASSED] oob_was/18020744125
[10:28:43] [PASSED] oob_was/1409600907
[10:28:43] [PASSED] oob_was/22014953428
[10:28:43] [PASSED] oob_was/16017236439
[10:28:43] [PASSED] oob_was/14019821291
[10:28:43] [PASSED] oob_was/14015076503
[10:28:43] [PASSED] oob_was/14018913170
[10:28:43] [PASSED] oob_was/14018094691
[10:28:43] [PASSED] oob_was/18024947630
[10:28:43] [PASSED] oob_was/16022287689
[10:28:43] [PASSED] oob_was/13011645652
[10:28:43] [PASSED] oob_was/14022293748
[10:28:43] [PASSED] oob_was/22019794406
[10:28:43] [PASSED] oob_was/22019338487
[10:28:43] [PASSED] oob_was/16023588340
[10:28:43] [PASSED] oob_was/14019789679
[10:28:43] [PASSED] oob_was/14022866841
[10:28:43] [PASSED] oob_was/16021333562
[10:28:43] [PASSED] oob_was/14016712196
[10:28:43] [PASSED] oob_was/14015568240
[10:28:43] [PASSED] oob_was/18013179988
[10:28:43] [PASSED] oob_was/1508761755
[10:28:43] [PASSED] oob_was/16023105232
[10:28:43] [PASSED] oob_was/16026508708
[10:28:43] [PASSED] oob_was/14020001231
[10:28:43] [PASSED] oob_was/16023683509
[10:28:43] [PASSED] oob_was/14025515070
[10:28:43] [PASSED] oob_was/15015404425_disable
[10:28:43] [PASSED] oob_was/16026007364
[10:28:43] [PASSED] oob_was/14020316580
[10:28:43] [PASSED] oob_was/14025883347
[10:28:43] [PASSED] oob_was/16029380221
[10:28:43] [PASSED] oob_was/22022079272
[10:28:43] [PASSED] oob_was/16029897822
[10:28:43] ============== [PASSED] xe_rtp_table_oob_test ==============
[10:28:43] ================ xe_rtp_table_dev_oob_test  ================
[10:28:43] [PASSED] device_oob_was/22010954014
[10:28:43] [PASSED] device_oob_was/15015404425
[10:28:43] [PASSED] device_oob_was/22019338487_display
[10:28:43] [PASSED] device_oob_was/14022085890
[10:28:43] [PASSED] device_oob_was/14026539277
[10:28:43] [PASSED] device_oob_was/14026633728
[10:28:43] [PASSED] device_oob_was/14026746987
[10:28:43] [PASSED] device_oob_was/14026779378
[10:28:43] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[10:28:43] ========== xe_rtp_table_missing_upper_bound_test  ==========
[10:28:43] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[10:28:43] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[10:28:43] [PASSED] register_whitelist/1806527549
[10:28:43] [PASSED] register_whitelist/allow_read_ctx_timestamp
[10:28:43] [PASSED] register_whitelist/allow_read_queue_timestamp
[10:28:43] [PASSED] register_whitelist/16014440446
[10:28:43] [PASSED] register_whitelist/16017236439
[10:28:43] [PASSED] register_whitelist/16020183090
[10:28:43] [PASSED] register_whitelist/14024997852
[10:28:43] [PASSED] register_whitelist/14024997852
[10:28:43] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[10:28:43] =============== [PASSED] xe_rtp_tables_test ================
[10:28:43] =================== xe_rtp (3 subtests) ====================
[10:28:43] =================== xe_rtp_rules_tests  ====================
[10:28:43] [PASSED] no
[10:28:43] [PASSED] yes
[10:28:43] [PASSED] no-and-no
[10:28:43] [PASSED] no-and-yes
[10:28:43] [PASSED] yes-and-no
[10:28:43] [PASSED] yes-and-yes
[10:28:43] [PASSED] no-or-no
[10:28:43] [PASSED] no-or-yes
[10:28:43] [PASSED] yes-or-no
[10:28:43] [PASSED] yes-or-yes
[10:28:43] [PASSED] no-yes-or-yes-no
[10:28:43] [PASSED] no-yes-or-yes-yes
[10:28:43] [PASSED] yes-yes-or-no-yes
[10:28:43] [PASSED] yes-yes-or-yes-yes
[10:28:43] [PASSED] no-no-or-yes-or-no
[10:28:43] [PASSED] or
[10:28:43] [PASSED] or-yes
[10:28:43] [PASSED] or-no
[10:28:43] [PASSED] yes-or
[10:28:43] [PASSED] no-or
[10:28:43] [PASSED] no-or-or-yes
[10:28:43] [PASSED] yes-or-or-no
[10:28:43] [PASSED] no-or-or-no
[10:28:43] [PASSED] missing-context-engine-class
[10:28:43] [PASSED] missing-context-engine-class-or-yes
[10:28:43] [PASSED] missing-context-engine-class-or-or-yes
[10:28:43] =============== [PASSED] xe_rtp_rules_tests ================
[10:28:43] =============== xe_rtp_process_to_sr_tests  ================
[10:28:43] [PASSED] coalesce-same-reg
[10:28:43] [PASSED] coalesce-same-reg-literal-and-func
[10:28:43] [PASSED] no-match-no-add
[10:28:43] [PASSED] two-regs-two-entries
[10:28:43] [PASSED] clr-one-set-other
[10:28:43] [PASSED] set-field
[10:28:43] [PASSED] conflict-duplicate
[10:28:43] [PASSED] conflict-not-disjoint
[10:28:43] [PASSED] conflict-not-disjoint-literal-and-func
[10:28:43] [PASSED] conflict-reg-type
[10:28:43] [PASSED] bad-mcr-reg-forced-to-regular
[10:28:43] [PASSED] bad-regular-reg-forced-to-mcr
[10:28:43] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:28:43] ================== xe_rtp_process_tests  ===================
[10:28:43] [PASSED] active1
[10:28:43] [PASSED] active2
[10:28:43] [PASSED] active-inactive
[10:28:43] [PASSED] inactive-active
[10:28:43] [PASSED] inactive-active-inactive
[10:28:43] [PASSED] inactive-inactive-inactive
[10:28:43] ============== [PASSED] xe_rtp_process_tests ===============
[10:28:43] ===================== [PASSED] xe_rtp ======================
[10:28:43] ==================== xe_wa (1 subtest) =====================
[10:28:43] ======================== xe_wa_gt  =========================
[10:28:43] [PASSED] TIGERLAKE B0
[10:28:43] [PASSED] DG1 A0
[10:28:43] [PASSED] DG1 B0
[10:28:43] [PASSED] ALDERLAKE_S A0
[10:28:43] [PASSED] ALDERLAKE_S B0
[10:28:43] [PASSED] ALDERLAKE_S C0
[10:28:43] [PASSED] ALDERLAKE_S D0
[10:28:43] [PASSED] ALDERLAKE_P A0
[10:28:43] [PASSED] ALDERLAKE_P B0
[10:28:43] [PASSED] ALDERLAKE_P C0
[10:28:43] [PASSED] ALDERLAKE_S RPLS D0
[10:28:43] [PASSED] ALDERLAKE_P RPLU E0
[10:28:43] [PASSED] DG2 G10 C0
[10:28:43] [PASSED] DG2 G11 B1
[10:28:43] [PASSED] DG2 G12 A1
[10:28:43] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:28:43] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:28:43] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:28:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:28:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:28:43] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:28:43] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:28:43] ==================== [PASSED] xe_wa_gt =====================
[10:28:43] ====================== [PASSED] xe_wa ======================
[10:28:43] ============================================================
[10:28:43] Testing complete. Ran 741 tests: passed: 723, skipped: 18
[10:28:43] Elapsed time: 36.679s total, 4.399s configuring, 31.614s building, 0.642s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:28:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:28:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:29:10] Starting KUnit Kernel (1/1)...
[10:29:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:29:10] ============ drm_test_pick_cmdline (2 subtests) ============
[10:29:10] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:29:10] =============== drm_test_pick_cmdline_named  ===============
[10:29:10] [PASSED] NTSC
[10:29:10] [PASSED] NTSC-J
[10:29:10] [PASSED] PAL
[10:29:10] [PASSED] PAL-M
[10:29:10] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:29:10] ============== [PASSED] drm_test_pick_cmdline ==============
[10:29:10] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:29:10] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:29:10] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:29:10] =========== drm_validate_clone_mode (2 subtests) ===========
[10:29:10] ============== drm_test_check_in_clone_mode  ===============
[10:29:10] [PASSED] in_clone_mode
[10:29:10] [PASSED] not_in_clone_mode
[10:29:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:29:10] =============== drm_test_check_valid_clones  ===============
[10:29:10] [PASSED] not_in_clone_mode
[10:29:10] [PASSED] valid_clone
[10:29:10] [PASSED] invalid_clone
[10:29:10] =========== [PASSED] drm_test_check_valid_clones ===========
[10:29:10] ============= [PASSED] drm_validate_clone_mode =============
[10:29:10] ============= drm_validate_modeset (1 subtest) =============
[10:29:10] [PASSED] drm_test_check_connector_changed_modeset
[10:29:10] ============== [PASSED] drm_validate_modeset ===============
[10:29:10] ====== drm_test_bridge_get_current_state (1 subtest) =======
[10:29:10] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:29:10] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:29:10] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:29:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:29:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:29:10] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[10:29:10] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:29:10] ============== drm_bridge_alloc (2 subtests) ===============
[10:29:10] [PASSED] drm_test_drm_bridge_alloc_basic
[10:29:10] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:29:10] ================ [PASSED] drm_bridge_alloc =================
[10:29:10] ============= drm_bridge_bus_fmt (5 subtests) ==============
[10:29:10] [PASSED] drm_test_bridge_rgb_yuv_rgb
[10:29:10] [PASSED] drm_test_bridge_must_convert_to_yuv444
[10:29:10] [PASSED] drm_test_bridge_hdmi_auto_rgb
[10:29:10] [PASSED] drm_test_bridge_auto_first
[10:29:10] [PASSED] drm_test_bridge_rgb_yuv_no_path
[10:29:10] =============== [PASSED] drm_bridge_bus_fmt ================
[10:29:10] ============= drm_cmdline_parser (40 subtests) =============
[10:29:10] [PASSED] drm_test_cmdline_force_d_only
[10:29:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:29:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:29:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:29:10] [PASSED] drm_test_cmdline_force_e_only
[10:29:10] [PASSED] drm_test_cmdline_res
[10:29:10] [PASSED] drm_test_cmdline_res_vesa
[10:29:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:29:10] [PASSED] drm_test_cmdline_res_rblank
[10:29:10] [PASSED] drm_test_cmdline_res_bpp
[10:29:10] [PASSED] drm_test_cmdline_res_refresh
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:29:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:29:10] [PASSED] drm_test_cmdline_res_margins_force_on
[10:29:10] [PASSED] drm_test_cmdline_res_vesa_margins
[10:29:10] [PASSED] drm_test_cmdline_name
[10:29:10] [PASSED] drm_test_cmdline_name_bpp
[10:29:10] [PASSED] drm_test_cmdline_name_option
[10:29:10] [PASSED] drm_test_cmdline_name_bpp_option
[10:29:10] [PASSED] drm_test_cmdline_rotate_0
[10:29:10] [PASSED] drm_test_cmdline_rotate_90
[10:29:10] [PASSED] drm_test_cmdline_rotate_180
[10:29:10] [PASSED] drm_test_cmdline_rotate_270
[10:29:10] [PASSED] drm_test_cmdline_hmirror
[10:29:10] [PASSED] drm_test_cmdline_vmirror
[10:29:10] [PASSED] drm_test_cmdline_margin_options
[10:29:10] [PASSED] drm_test_cmdline_multiple_options
[10:29:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:29:10] [PASSED] drm_test_cmdline_extra_and_option
[10:29:10] [PASSED] drm_test_cmdline_freestanding_options
[10:29:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:29:10] [PASSED] drm_test_cmdline_panel_orientation
[10:29:10] ================ drm_test_cmdline_invalid  =================
[10:29:10] [PASSED] margin_only
[10:29:10] [PASSED] interlace_only
[10:29:10] [PASSED] res_missing_x
[10:29:10] [PASSED] res_missing_y
[10:29:10] [PASSED] res_bad_y
[10:29:10] [PASSED] res_missing_y_bpp
[10:29:10] [PASSED] res_bad_bpp
[10:29:10] [PASSED] res_bad_refresh
[10:29:10] [PASSED] res_bpp_refresh_force_on_off
[10:29:10] [PASSED] res_invalid_mode
[10:29:10] [PASSED] res_bpp_wrong_place_mode
[10:29:10] [PASSED] name_bpp_refresh
[10:29:10] [PASSED] name_refresh
[10:29:10] [PASSED] name_refresh_wrong_mode
[10:29:10] [PASSED] name_refresh_invalid_mode
[10:29:10] [PASSED] rotate_multiple
[10:29:10] [PASSED] rotate_invalid_val
[10:29:10] [PASSED] rotate_truncated
[10:29:10] [PASSED] invalid_option
[10:29:10] [PASSED] invalid_tv_option
[10:29:10] [PASSED] truncated_tv_option
[10:29:10] ============ [PASSED] drm_test_cmdline_invalid =============
[10:29:10] =============== drm_test_cmdline_tv_options  ===============
[10:29:10] [PASSED] NTSC
[10:29:10] [PASSED] NTSC_443
[10:29:10] [PASSED] NTSC_J
[10:29:10] [PASSED] PAL
[10:29:10] [PASSED] PAL_M
[10:29:10] [PASSED] PAL_N
[10:29:10] [PASSED] SECAM
[10:29:10] [PASSED] MONO_525
[10:29:10] [PASSED] MONO_625
[10:29:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:29:10] =============== [PASSED] drm_cmdline_parser ================
[10:29:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:29:10] [PASSED] drm_test_connector_hdmi_init_valid
[10:29:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:29:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:29:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:29:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:29:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:29:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:29:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:29:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:29:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:29:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:29:10] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:29:10] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:29:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:29:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:29:10] [PASSED] drm_test_connector_hdmi_init_null_product
[10:29:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:29:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:29:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:29:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:29:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:29:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:29:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:29:10] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:29:10] [PASSED] HDMI-A
[10:29:10] [PASSED] HDMI-B
[10:29:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:29:10] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:29:10] [PASSED] Unknown
[10:29:10] [PASSED] VGA
[10:29:10] [PASSED] DVI-I
[10:29:10] [PASSED] DVI-D
[10:29:10] [PASSED] DVI-A
[10:29:10] [PASSED] Composite
[10:29:10] [PASSED] SVIDEO
[10:29:10] [PASSED] LVDS
[10:29:10] [PASSED] Component
[10:29:10] [PASSED] DIN
[10:29:10] [PASSED] DP
[10:29:10] [PASSED] TV
[10:29:10] [PASSED] eDP
[10:29:10] [PASSED] Virtual
[10:29:10] [PASSED] DSI
[10:29:10] [PASSED] DPI
[10:29:10] [PASSED] Writeback
[10:29:10] [PASSED] SPI
[10:29:10] [PASSED] USB
[10:29:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:29:10] ============ [PASSED] drmm_connector_hdmi_init =============
[10:29:10] ============= drmm_connector_init (3 subtests) =============
[10:29:10] [PASSED] drm_test_drmm_connector_init
[10:29:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:29:10] ========= drm_test_drmm_connector_init_type_valid  =========
[10:29:10] [PASSED] Unknown
[10:29:10] [PASSED] VGA
[10:29:10] [PASSED] DVI-I
[10:29:10] [PASSED] DVI-D
[10:29:10] [PASSED] DVI-A
[10:29:10] [PASSED] Composite
[10:29:10] [PASSED] SVIDEO
[10:29:10] [PASSED] LVDS
[10:29:10] [PASSED] Component
[10:29:10] [PASSED] DIN
[10:29:10] [PASSED] DP
[10:29:10] [PASSED] HDMI-A
[10:29:10] [PASSED] HDMI-B
[10:29:10] [PASSED] TV
[10:29:10] [PASSED] eDP
[10:29:10] [PASSED] Virtual
[10:29:10] [PASSED] DSI
[10:29:10] [PASSED] DPI
[10:29:10] [PASSED] Writeback
[10:29:10] [PASSED] SPI
[10:29:10] [PASSED] USB
[10:29:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:29:10] =============== [PASSED] drmm_connector_init ===============
[10:29:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_init
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:29:10] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:29:10] [PASSED] Unknown
[10:29:10] [PASSED] VGA
[10:29:10] [PASSED] DVI-I
[10:29:10] [PASSED] DVI-D
[10:29:10] [PASSED] DVI-A
[10:29:10] [PASSED] Composite
[10:29:10] [PASSED] SVIDEO
[10:29:10] [PASSED] LVDS
[10:29:10] [PASSED] Component
[10:29:10] [PASSED] DIN
[10:29:10] [PASSED] DP
[10:29:10] [PASSED] HDMI-A
[10:29:10] [PASSED] HDMI-B
[10:29:10] [PASSED] TV
[10:29:10] [PASSED] eDP
[10:29:10] [PASSED] Virtual
[10:29:10] [PASSED] DSI
[10:29:10] [PASSED] DPI
[10:29:10] [PASSED] Writeback
[10:29:10] [PASSED] SPI
[10:29:10] [PASSED] USB
[10:29:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:29:10] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:29:10] [PASSED] Unknown
[10:29:10] [PASSED] VGA
[10:29:10] [PASSED] DVI-I
[10:29:10] [PASSED] DVI-D
[10:29:10] [PASSED] DVI-A
[10:29:10] [PASSED] Composite
[10:29:10] [PASSED] SVIDEO
[10:29:10] [PASSED] LVDS
[10:29:10] [PASSED] Component
[10:29:10] [PASSED] DIN
[10:29:10] [PASSED] DP
[10:29:10] [PASSED] HDMI-A
[10:29:10] [PASSED] HDMI-B
[10:29:10] [PASSED] TV
[10:29:10] [PASSED] eDP
[10:29:10] [PASSED] Virtual
[10:29:10] [PASSED] DSI
[10:29:10] [PASSED] DPI
[10:29:10] [PASSED] Writeback
[10:29:10] [PASSED] SPI
[10:29:10] [PASSED] USB
[10:29:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:29:10] =========== [PASSED] drm_connector_dynamic_init ============
[10:29:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:29:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:29:10] ======= drm_connector_dynamic_register (7 subtests) ========
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:29:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:29:10] ========= [PASSED] drm_connector_dynamic_register ==========
[10:29:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:29:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:29:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:29:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:29:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:29:10] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:29:10] [PASSED] NTSC
[10:29:10] [PASSED] NTSC-443
[10:29:10] [PASSED] NTSC-J
[10:29:10] [PASSED] PAL
[10:29:10] [PASSED] PAL-M
[10:29:10] [PASSED] PAL-N
[10:29:10] [PASSED] SECAM
[10:29:10] [PASSED] Mono
[10:29:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:29:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:29:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:29:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:29:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:29:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:29:10] [PASSED] VIC 96
[10:29:10] [PASSED] VIC 97
[10:29:10] [PASSED] VIC 101
[10:29:10] [PASSED] VIC 102
[10:29:10] [PASSED] VIC 106
[10:29:10] [PASSED] VIC 107
[10:29:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:29:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:29:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:29:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:29:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:29:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:29:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:29:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:29:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:29:10] [PASSED] Automatic
[10:29:10] [PASSED] Full
[10:29:10] [PASSED] Limited 16:235
[10:29:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:29:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:29:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:29:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:29:10] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:29:10] [PASSED] RGB
[10:29:10] [PASSED] YUV 4:2:0
[10:29:10] [PASSED] YUV 4:2:2
[10:29:10] [PASSED] YUV 4:4:4
[10:29:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:29:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:29:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:29:10] ============= drm_damage_helper (21 subtests) ==============
[10:29:10] [PASSED] drm_test_damage_iter_no_damage
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:29:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:29:10] [PASSED] drm_test_damage_iter_simple_damage
[10:29:10] [PASSED] drm_test_damage_iter_single_damage
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:29:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:29:10] [PASSED] drm_test_damage_iter_damage
[10:29:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:29:10] [PASSED] drm_test_damage_iter_damage_one_outside
[10:29:10] [PASSED] drm_test_damage_iter_damage_src_moved
[10:29:10] [PASSED] drm_test_damage_iter_damage_not_visible
[10:29:10] ================ [PASSED] drm_damage_helper ================
[10:29:10] ============== drm_dp_mst_helper (3 subtests) ==============
[10:29:10] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:29:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:29:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:29:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:29:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:29:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:29:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:29:10] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:29:10] [PASSED] Link rate 2000000 lane count 4
[10:29:10] [PASSED] Link rate 2000000 lane count 2
[10:29:10] [PASSED] Link rate 2000000 lane count 1
[10:29:10] [PASSED] Link rate 1350000 lane count 4
[10:29:10] [PASSED] Link rate 1350000 lane count 2
[10:29:10] [PASSED] Link rate 1350000 lane count 1
[10:29:10] [PASSED] Link rate 1000000 lane count 4
[10:29:10] [PASSED] Link rate 1000000 lane count 2
[10:29:10] [PASSED] Link rate 1000000 lane count 1
[10:29:10] [PASSED] Link rate 810000 lane count 4
[10:29:10] [PASSED] Link rate 810000 lane count 2
[10:29:10] [PASSED] Link rate 810000 lane count 1
[10:29:10] [PASSED] Link rate 540000 lane count 4
[10:29:10] [PASSED] Link rate 540000 lane count 2
[10:29:10] [PASSED] Link rate 540000 lane count 1
[10:29:10] [PASSED] Link rate 270000 lane count 4
[10:29:10] [PASSED] Link rate 270000 lane count 2
[10:29:10] [PASSED] Link rate 270000 lane count 1
[10:29:10] [PASSED] Link rate 162000 lane count 4
[10:29:10] [PASSED] Link rate 162000 lane count 2
[10:29:10] [PASSED] Link rate 162000 lane count 1
[10:29:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:29:10] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:29:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:29:10] [PASSED] DP_POWER_UP_PHY with port number
[10:29:10] [PASSED] DP_POWER_DOWN_PHY with port number
[10:29:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:29:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:29:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:29:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:29:10] [PASSED] DP_QUERY_PAYLOAD with port number
[10:29:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:29:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:29:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:29:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:29:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:29:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:29:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:29:10] [PASSED] DP_REMOTE_I2C_READ with port number
[10:29:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:29:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:29:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:29:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:29:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:29:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:29:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:29:10] ================ [PASSED] drm_dp_mst_helper ================
[10:29:10] ================== drm_exec (7 subtests) ===================
[10:29:10] [PASSED] sanitycheck
[10:29:10] [PASSED] test_lock
[10:29:10] [PASSED] test_lock_unlock
[10:29:10] [PASSED] test_duplicates
[10:29:10] [PASSED] test_prepare
[10:29:10] [PASSED] test_prepare_array
[10:29:10] [PASSED] test_multiple_loops
[10:29:10] ==================== [PASSED] drm_exec =====================
[10:29:10] =========== drm_format_helper_test (17 subtests) ===========
[10:29:10] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:29:10] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:29:10] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:29:10] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:29:10] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:29:10] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:29:10] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:29:10] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:29:10] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:29:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:29:10] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:29:10] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:29:10] ==================== drm_test_fb_swab  =====================
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ================ [PASSED] drm_test_fb_swab =================
[10:29:10] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:29:10] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:29:10] [PASSED] single_pixel_source_buffer
[10:29:10] [PASSED] single_pixel_clip_rectangle
[10:29:10] [PASSED] well_known_colors
[10:29:10] [PASSED] destination_pitch
[10:29:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:29:10] ================= drm_test_fb_clip_offset  =================
[10:29:10] [PASSED] pass through
[10:29:10] [PASSED] horizontal offset
[10:29:10] [PASSED] vertical offset
[10:29:10] [PASSED] horizontal and vertical offset
[10:29:10] [PASSED] horizontal offset (custom pitch)
[10:29:10] [PASSED] vertical offset (custom pitch)
[10:29:10] [PASSED] horizontal and vertical offset (custom pitch)
[10:29:10] ============= [PASSED] drm_test_fb_clip_offset =============
[10:29:10] =================== drm_test_fb_memcpy  ====================
[10:29:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:29:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:29:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:29:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:29:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:29:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:29:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:29:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:29:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:29:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:29:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:29:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:29:10] =============== [PASSED] drm_test_fb_memcpy ================
[10:29:10] ============= [PASSED] drm_format_helper_test ==============
[10:29:10] ================= drm_format (18 subtests) =================
[10:29:10] [PASSED] drm_test_format_block_width_invalid
[10:29:10] [PASSED] drm_test_format_block_width_one_plane
[10:29:10] [PASSED] drm_test_format_block_width_two_plane
[10:29:10] [PASSED] drm_test_format_block_width_three_plane
[10:29:10] [PASSED] drm_test_format_block_width_tiled
[10:29:10] [PASSED] drm_test_format_block_height_invalid
[10:29:10] [PASSED] drm_test_format_block_height_one_plane
[10:29:10] [PASSED] drm_test_format_block_height_two_plane
[10:29:10] [PASSED] drm_test_format_block_height_three_plane
[10:29:10] [PASSED] drm_test_format_block_height_tiled
[10:29:10] [PASSED] drm_test_format_min_pitch_invalid
[10:29:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:29:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:29:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:29:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:29:10] [PASSED] drm_test_format_min_pitch_two_plane
[10:29:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:29:10] [PASSED] drm_test_format_min_pitch_tiled
[10:29:10] =================== [PASSED] drm_format ====================
[10:29:10] ============== drm_framebuffer (10 subtests) ===============
[10:29:10] ========== drm_test_framebuffer_check_src_coords  ==========
[10:29:10] [PASSED] Success: source fits into fb
[10:29:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:29:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:29:10] [PASSED] Fail: overflowing fb with source width
[10:29:10] [PASSED] Fail: overflowing fb with source height
[10:29:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:29:10] [PASSED] drm_test_framebuffer_cleanup
[10:29:10] =============== drm_test_framebuffer_create  ===============
[10:29:10] [PASSED] ABGR8888 normal sizes
[10:29:10] [PASSED] ABGR8888 max sizes
[10:29:10] [PASSED] ABGR8888 pitch greater than min required
[10:29:10] [PASSED] ABGR8888 pitch less than min required
[10:29:10] [PASSED] ABGR8888 Invalid width
[10:29:10] [PASSED] ABGR8888 Invalid buffer handle
[10:29:10] [PASSED] No pixel format
[10:29:10] [PASSED] ABGR8888 Width 0
[10:29:10] [PASSED] ABGR8888 Height 0
[10:29:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:29:10] [PASSED] ABGR8888 Large buffer offset
[10:29:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:29:10] [PASSED] ABGR8888 Invalid flag
[10:29:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:29:10] [PASSED] ABGR8888 Valid buffer modifier
[10:29:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:29:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] NV12 Normal sizes
[10:29:10] [PASSED] NV12 Max sizes
[10:29:10] [PASSED] NV12 Invalid pitch
[10:29:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:29:10] [PASSED] NV12 different  modifier per-plane
[10:29:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:29:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] NV12 Modifier for inexistent plane
[10:29:10] [PASSED] NV12 Handle for inexistent plane
[10:29:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:29:10] [PASSED] YVU420 Normal sizes
[10:29:10] [PASSED] YVU420 Max sizes
[10:29:10] [PASSED] YVU420 Invalid pitch
[10:29:10] [PASSED] YVU420 Different pitches
[10:29:10] [PASSED] YVU420 Different buffer offsets/pitches
[10:29:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:29:10] [PASSED] YVU420 Valid modifier
[10:29:10] [PASSED] YVU420 Different modifiers per plane
[10:29:10] [PASSED] YVU420 Modifier for inexistent plane
[10:29:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:29:10] [PASSED] X0L2 Normal sizes
[10:29:10] [PASSED] X0L2 Max sizes
[10:29:10] [PASSED] X0L2 Invalid pitch
[10:29:10] [PASSED] X0L2 Pitch greater than minimum required
[10:29:10] [PASSED] X0L2 Handle for inexistent plane
[10:29:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:29:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:29:10] [PASSED] X0L2 Valid modifier
[10:29:10] [PASSED] X0L2 Modifier for inexistent plane
[10:29:10] =========== [PASSED] drm_test_framebuffer_create ===========
[10:29:10] [PASSED] drm_test_framebuffer_free
[10:29:10] [PASSED] drm_test_framebuffer_init
[10:29:10] [PASSED] drm_test_framebuffer_init_bad_format
[10:29:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:29:10] [PASSED] drm_test_framebuffer_lookup
[10:29:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:29:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:29:10] ================= [PASSED] drm_framebuffer =================
[10:29:10] ================ drm_gem_shmem (8 subtests) ================
[10:29:10] [PASSED] drm_gem_shmem_test_obj_create
[10:29:10] [PASSED] drm_gem_shmem_test_obj_create_private
[10:29:10] [PASSED] drm_gem_shmem_test_pin_pages
[10:29:10] [PASSED] drm_gem_shmem_test_vmap
[10:29:10] [PASSED] drm_gem_shmem_test_get_sg_table
[10:29:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:29:10] [PASSED] drm_gem_shmem_test_madvise
[10:29:10] [PASSED] drm_gem_shmem_test_purge
[10:29:10] ================== [PASSED] drm_gem_shmem ==================
[10:29:10] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:29:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:29:10] [PASSED] Automatic
[10:29:10] [PASSED] Full
[10:29:10] [PASSED] Limited 16:235
[10:29:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:29:10] [PASSED] drm_test_check_disable_connector
[10:29:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:29:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:29:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:29:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:29:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:29:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:29:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:29:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:29:10] [PASSED] drm_test_check_output_bpc_dvi
[10:29:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:29:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:29:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:29:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:29:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:29:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:29:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:29:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:29:10] ============ drm_test_check_hdmi_color_format  =============
[10:29:10] [PASSED] AUTO -> RGB
[10:29:10] [PASSED] YCBCR422 -> YUV422
[10:29:10] [PASSED] YCBCR420 -> YUV420
[10:29:10] [PASSED] YCBCR444 -> YUV444
[10:29:10] [PASSED] RGB -> RGB
[10:29:10] ======== [PASSED] drm_test_check_hdmi_color_format =========
[10:29:10] ======== drm_test_check_hdmi_color_format_420_only  ========
[10:29:10] [PASSED] RGB should fail
[10:29:10] [PASSED] YUV444 should fail
[10:29:10] [PASSED] YUV422 should fail
[10:29:10] [PASSED] YUV420 should work
[10:29:10] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[10:29:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:29:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:29:10] [PASSED] drm_test_check_broadcast_rgb_value
[10:29:10] [PASSED] drm_test_check_bpc_8_value
[10:29:10] [PASSED] drm_test_check_bpc_10_value
[10:29:10] [PASSED] drm_test_check_bpc_12_value
[10:29:10] [PASSED] drm_test_check_format_value
[10:29:10] [PASSED] drm_test_check_tmds_char_value
[10:29:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:29:10] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[10:29:10] [PASSED] drm_test_check_mode_valid
[10:29:10] [PASSED] drm_test_check_mode_valid_reject
[10:29:10] [PASSED] drm_test_check_mode_valid_reject_rate
[10:29:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:29:10] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[10:29:10] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[10:29:10] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[10:29:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:29:10] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:29:10] [PASSED] drm_test_check_infoframes
[10:29:10] [PASSED] drm_test_check_reject_avi_infoframe
[10:29:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:29:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:29:10] [PASSED] drm_test_check_reject_audio_infoframe
[10:29:10] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:29:10] ================= drm_managed (2 subtests) =================
[10:29:10] [PASSED] drm_test_managed_release_action
[10:29:10] [PASSED] drm_test_managed_run_action
[10:29:10] =================== [PASSED] drm_managed ===================
[10:29:10] =================== drm_mm (6 subtests) ====================
[10:29:10] [PASSED] drm_test_mm_init
[10:29:10] [PASSED] drm_test_mm_debug
[10:29:10] [PASSED] drm_test_mm_align32
[10:29:10] [PASSED] drm_test_mm_align64
[10:29:10] [PASSED] drm_test_mm_lowest
[10:29:10] [PASSED] drm_test_mm_highest
[10:29:10] ===================== [PASSED] drm_mm ======================
[10:29:10] ============= drm_modes_analog_tv (5 subtests) =============
[10:29:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:29:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:29:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:29:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:29:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:29:10] =============== [PASSED] drm_modes_analog_tv ===============
[10:29:10] ============== drm_plane_helper (2 subtests) ===============
[10:29:10] =============== drm_test_check_plane_state  ================
[10:29:10] [PASSED] clipping_simple
[10:29:10] [PASSED] clipping_rotate_reflect
[10:29:10] [PASSED] positioning_simple
[10:29:10] [PASSED] upscaling
[10:29:10] [PASSED] downscaling
[10:29:10] [PASSED] rounding1
[10:29:10] [PASSED] rounding2
[10:29:10] [PASSED] rounding3
[10:29:10] [PASSED] rounding4
[10:29:10] =========== [PASSED] drm_test_check_plane_state ============
[10:29:10] =========== drm_test_check_invalid_plane_state  ============
[10:29:10] [PASSED] positioning_invalid
[10:29:10] [PASSED] upscaling_invalid
[10:29:10] [PASSED] downscaling_invalid
[10:29:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:29:10] ================ [PASSED] drm_plane_helper =================
[10:29:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:29:10] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:29:10] [PASSED] None
[10:29:10] [PASSED] PAL
[10:29:10] [PASSED] NTSC
[10:29:10] [PASSED] Both, NTSC Default
[10:29:10] [PASSED] Both, PAL Default
[10:29:10] [PASSED] Both, NTSC Default, with PAL on command-line
[10:29:10] [PASSED] Both, PAL Default, with NTSC on command-line
[10:29:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:29:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:29:10] ================== drm_rect (9 subtests) ===================
[10:29:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:29:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:29:10] [PASSED] drm_test_rect_clip_scaled_clipped
[10:29:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:29:10] ================= drm_test_rect_intersect  =================
[10:29:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:29:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:29:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:29:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:29:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:29:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:29:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:29:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:29:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:29:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:29:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:29:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:29:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:29:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:29:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:29:10] ============= [PASSED] drm_test_rect_intersect =============
[10:29:10] ================ drm_test_rect_calc_hscale  ================
[10:29:10] [PASSED] normal use
[10:29:10] [PASSED] out of max range
[10:29:10] [PASSED] out of min range
[10:29:10] [PASSED] zero dst
[10:29:10] [PASSED] negative src
[10:29:10] [PASSED] negative dst
[10:29:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:29:10] ================ drm_test_rect_calc_vscale  ================
[10:29:10] [PASSED] normal use
[10:29:10] [PASSED] out of max range
[10:29:10] [PASSED] out of min range
[10:29:10] [PASSED] zero dst
[10:29:10] [PASSED] negative src
[10:29:10] [PASSED] negative dst
[10:29:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:29:10] ================== drm_test_rect_rotate  ===================
[10:29:10] [PASSED] reflect-x
[10:29:10] [PASSED] reflect-y
[10:29:10] [PASSED] rotate-0
[10:29:10] [PASSED] rotate-90
[10:29:10] [PASSED] rotate-180
[10:29:10] [PASSED] rotate-270
[10:29:10] ============== [PASSED] drm_test_rect_rotate ===============
[10:29:10] ================ drm_test_rect_rotate_inv  =================
[10:29:10] [PASSED] reflect-x
[10:29:10] [PASSED] reflect-y
[10:29:10] [PASSED] rotate-0
[10:29:10] [PASSED] rotate-90
[10:29:10] [PASSED] rotate-180
[10:29:10] [PASSED] rotate-270
[10:29:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:29:10] ==================== [PASSED] drm_rect =====================
[10:29:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:29:10] ============ drm_test_sysfb_build_fourcc_list  =============
[10:29:10] [PASSED] no native formats
[10:29:10] [PASSED] XRGB8888 as native format
[10:29:10] [PASSED] remove duplicates
[10:29:10] [PASSED] convert alpha formats
[10:29:10] [PASSED] random formats
[10:29:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:29:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:29:10] ================== drm_fixp (2 subtests) ===================
[10:29:10] [PASSED] drm_test_int2fixp
[10:29:10] [PASSED] drm_test_sm2fixp
[10:29:10] ==================== [PASSED] drm_fixp =====================
[10:29:10] ============================================================
[10:29:10] Testing complete. Ran 637 tests: passed: 637
[10:29:10] Elapsed time: 26.736s total, 1.819s configuring, 24.751s building, 0.146s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:29:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:29:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:29:22] Starting KUnit Kernel (1/1)...
[10:29:22] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:29:22] ================= ttm_device (5 subtests) ==================
[10:29:22] [PASSED] ttm_device_init_basic
[10:29:22] [PASSED] ttm_device_init_multiple
[10:29:22] [PASSED] ttm_device_fini_basic
[10:29:22] [PASSED] ttm_device_init_no_vma_man
[10:29:22] ================== ttm_device_init_pools  ==================
[10:29:22] [PASSED] No DMA allocations, no DMA32 required
[10:29:22] [PASSED] DMA allocations, DMA32 required
[10:29:22] [PASSED] No DMA allocations, DMA32 required
[10:29:22] [PASSED] DMA allocations, no DMA32 required
[10:29:22] ============== [PASSED] ttm_device_init_pools ==============
[10:29:22] =================== [PASSED] ttm_device ====================
[10:29:22] ================== ttm_pool (8 subtests) ===================
[10:29:22] ================== ttm_pool_alloc_basic  ===================
[10:29:22] [PASSED] One page
[10:29:22] [PASSED] More than one page
[10:29:22] [PASSED] Above the allocation limit
[10:29:22] [PASSED] One page, with coherent DMA mappings enabled
[10:29:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:29:22] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:29:22] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:29:22] [PASSED] One page
[10:29:22] [PASSED] More than one page
[10:29:22] [PASSED] Above the allocation limit
[10:29:22] [PASSED] One page, with coherent DMA mappings enabled
[10:29:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:29:22] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:29:22] [PASSED] ttm_pool_alloc_order_caching_match
[10:29:22] [PASSED] ttm_pool_alloc_caching_mismatch
[10:29:22] [PASSED] ttm_pool_alloc_order_mismatch
[10:29:22] [PASSED] ttm_pool_free_dma_alloc
[10:29:22] [PASSED] ttm_pool_free_no_dma_alloc
[10:29:22] [PASSED] ttm_pool_fini_basic
[10:29:22] ==================== [PASSED] ttm_pool =====================
[10:29:22] ================ ttm_resource (8 subtests) =================
[10:29:22] ================= ttm_resource_init_basic  =================
[10:29:22] [PASSED] Init resource in TTM_PL_SYSTEM
[10:29:22] [PASSED] Init resource in TTM_PL_VRAM
[10:29:22] [PASSED] Init resource in a private placement
[10:29:22] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:29:22] ============= [PASSED] ttm_resource_init_basic =============
[10:29:22] [PASSED] ttm_resource_init_pinned
[10:29:22] [PASSED] ttm_resource_fini_basic
[10:29:22] [PASSED] ttm_resource_manager_init_basic
[10:29:22] [PASSED] ttm_resource_manager_usage_basic
[10:29:22] [PASSED] ttm_resource_manager_set_used_basic
[10:29:22] [PASSED] ttm_sys_man_alloc_basic
[10:29:22] [PASSED] ttm_sys_man_free_basic
[10:29:22] ================== [PASSED] ttm_resource ===================
[10:29:22] =================== ttm_tt (15 subtests) ===================
[10:29:22] ==================== ttm_tt_init_basic  ====================
[10:29:22] [PASSED] Page-aligned size
[10:29:22] [PASSED] Extra pages requested
[10:29:22] ================ [PASSED] ttm_tt_init_basic ================
[10:29:22] [PASSED] ttm_tt_init_misaligned
[10:29:22] [PASSED] ttm_tt_fini_basic
[10:29:22] [PASSED] ttm_tt_fini_sg
[10:29:22] [PASSED] ttm_tt_fini_shmem
[10:29:22] [PASSED] ttm_tt_create_basic
[10:29:22] [PASSED] ttm_tt_create_invalid_bo_type
[10:29:22] [PASSED] ttm_tt_create_ttm_exists
[10:29:22] [PASSED] ttm_tt_create_failed
[10:29:22] [PASSED] ttm_tt_destroy_basic
[10:29:22] [PASSED] ttm_tt_populate_null_ttm
[10:29:22] [PASSED] ttm_tt_populate_populated_ttm
[10:29:22] [PASSED] ttm_tt_unpopulate_basic
[10:29:22] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:29:22] [PASSED] ttm_tt_swapin_basic
[10:29:22] ===================== [PASSED] ttm_tt ======================
[10:29:22] =================== ttm_bo (14 subtests) ===================
[10:29:22] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:29:22] [PASSED] Cannot be interrupted and sleeps
[10:29:22] [PASSED] Cannot be interrupted, locks straight away
[10:29:22] [PASSED] Can be interrupted, sleeps
[10:29:22] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:29:22] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:29:22] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:29:22] [PASSED] ttm_bo_reserve_double_resv
[10:29:22] [PASSED] ttm_bo_reserve_interrupted
[10:29:22] [PASSED] ttm_bo_reserve_deadlock
[10:29:22] [PASSED] ttm_bo_unreserve_basic
[10:29:22] [PASSED] ttm_bo_unreserve_pinned
[10:29:22] [PASSED] ttm_bo_unreserve_bulk
[10:29:22] [PASSED] ttm_bo_fini_basic
[10:29:22] [PASSED] ttm_bo_fini_shared_resv
[10:29:22] [PASSED] ttm_bo_pin_basic
[10:29:22] [PASSED] ttm_bo_pin_unpin_resource
[10:29:22] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:29:22] ===================== [PASSED] ttm_bo ======================
[10:29:22] ============== ttm_bo_validate (22 subtests) ===============
[10:29:22] ============== ttm_bo_init_reserved_sys_man  ===============
[10:29:22] [PASSED] Buffer object for userspace
[10:29:22] [PASSED] Kernel buffer object
[10:29:22] [PASSED] Shared buffer object
[10:29:22] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:29:22] ============== ttm_bo_init_reserved_mock_man  ==============
[10:29:22] [PASSED] Buffer object for userspace
[10:29:22] [PASSED] Kernel buffer object
[10:29:22] [PASSED] Shared buffer object
[10:29:22] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:29:22] [PASSED] ttm_bo_init_reserved_resv
[10:29:22] ================== ttm_bo_validate_basic  ==================
[10:29:22] [PASSED] Buffer object for userspace
[10:29:22] [PASSED] Kernel buffer object
[10:29:22] [PASSED] Shared buffer object
[10:29:22] ============== [PASSED] ttm_bo_validate_basic ==============
[10:29:22] [PASSED] ttm_bo_validate_invalid_placement
[10:29:22] ============= ttm_bo_validate_same_placement  ==============
[10:29:22] [PASSED] System manager
[10:29:22] [PASSED] VRAM manager
[10:29:22] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:29:22] [PASSED] ttm_bo_validate_failed_alloc
[10:29:22] [PASSED] ttm_bo_validate_pinned
[10:29:22] [PASSED] ttm_bo_validate_busy_placement
[10:29:22] ================ ttm_bo_validate_multihop  =================
[10:29:22] [PASSED] Buffer object for userspace
[10:29:22] [PASSED] Kernel buffer object
[10:29:22] [PASSED] Shared buffer object
[10:29:22] ============ [PASSED] ttm_bo_validate_multihop =============
[10:29:22] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:29:22] [PASSED] Buffer object in system domain, no page vector
[10:29:22] [PASSED] Buffer object in system domain with an existing page vector
[10:29:22] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:29:22] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:29:22] [PASSED] Buffer object for userspace
[10:29:22] [PASSED] Kernel buffer object
[10:29:22] [PASSED] Shared buffer object
[10:29:22] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:29:22] [PASSED] ttm_bo_validate_move_fence_signaled
[10:29:22] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:29:22] [PASSED] Waits for GPU
[10:29:22] [PASSED] Tries to lock straight away
[10:29:22] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:29:22] [PASSED] ttm_bo_validate_swapout
[10:29:22] [PASSED] ttm_bo_validate_happy_evict
[10:29:22] [PASSED] ttm_bo_validate_all_pinned_evict
[10:29:22] [PASSED] ttm_bo_validate_allowed_only_evict
[10:29:22] [PASSED] ttm_bo_validate_deleted_evict
[10:29:22] [PASSED] ttm_bo_validate_busy_domain_evict
[10:29:22] [PASSED] ttm_bo_validate_evict_gutting
[10:29:22] [PASSED] ttm_bo_validate_recrusive_evict
[10:29:22] ================= [PASSED] ttm_bo_validate =================
[10:29:22] ============================================================
[10:29:22] Testing complete. Ran 102 tests: passed: 102
[10:29:22] Elapsed time: 11.921s total, 1.760s configuring, 9.946s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

* [v2 1/2] drm/i915/display: Add Wa_16030862157 to the display workaround list
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
  2026-07-15 10:29 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-07-15 10:41 ` Uma Shankar
  2026-07-15 10:41 ` [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16 Uma Shankar
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Uma Shankar @ 2026-07-15 10:41 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: vinod.govindapillai, suraj.kandpal, Uma Shankar

Register Wa_16030862157 in the display workaround framework so that its
platform applicability lives in one place (__intel_display_wa()) rather
than being open-coded at each use site. The workaround applies to Xe3p
(DISPLAY_VER >= 35).

No functional change: this only adds the enum entry and the matching
case; consumers are wired up in a follow-up change.

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
 drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index b4c49816f7eb..d6b036da3992 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -140,6 +140,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
 						STEP_A0, STEP_B0);
 	case INTEL_DISPLAY_WA_16029024088:
 		return DISPLAY_VER(display) >= 35;
+	case INTEL_DISPLAY_WA_16030862157:
+		return DISPLAY_VER(display) >= 35;
 	case INTEL_DISPLAY_WA_18034343758:
 		return DISPLAY_VER(display) == 20 ||
 			(display->platform.pantherlake &&
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 92b3980bea84..338b32e4162d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -54,6 +54,7 @@ enum intel_display_wa {
 	INTEL_DISPLAY_WA_16025573575,
 	INTEL_DISPLAY_WA_16025596647,
 	INTEL_DISPLAY_WA_16029024088,
+	INTEL_DISPLAY_WA_16030862157,
 	INTEL_DISPLAY_WA_18034343758,
 	INTEL_DISPLAY_WA_22010178259,
 	INTEL_DISPLAY_WA_22010947358,
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
  2026-07-15 10:29 ` ✓ CI.KUnit: success for " Patchwork
  2026-07-15 10:41 ` [v2 1/2] drm/i915/display: Add Wa_16030862157 to the display workaround list Uma Shankar
@ 2026-07-15 10:41 ` Uma Shankar
  2026-07-15 12:30   ` Govindapillai, Vinod
  2026-07-15 11:05 ` ✓ Xe.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157 Patchwork
                   ` (3 subsequent siblings)
  6 siblings, 1 reply; 10+ messages in thread
From: Uma Shankar @ 2026-07-15 10:41 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: vinod.govindapillai, suraj.kandpal, Uma Shankar

The register MEM_SS_INFO_GLOBAL [Number of populated channels] field
definition is updated with an encoding for 16 channels.

For 16-channel configuration, program 1111b. A programmed value of 1111b
must be interpreted as 16 channels for memory bandwidth calculations.

The MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits and cannot
encode 16, so on Xe3p the BIOS programs the saturated field value (0xf)
to indicate the fully-populated 16-channel config (4 memory controllers
x 4 channels). Interpret it as 16 and let the bandwidth math handle the
larger channel count.

Gate the behaviour through intel_display_wa(INTEL_DISPLAY_WA_16030862157)
instead of an open-coded DISPLAY_VER() check.

v2: Switched to intel_display_wa.c framework (Suraj)

WA: 16030862157
Bspec: 69131, 68859
Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c   | 20 +++++++++++++++++---
 drivers/gpu/drm/i915/display/intel_dram.c | 12 ++++++++++++
 2 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 41539fdfeac5..aaa0350dca78 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -14,6 +14,7 @@
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
+#include "intel_display_wa.h"
 #include "intel_dram.h"
 #include "intel_mchbar.h"
 #include "intel_parent.h"
@@ -272,7 +273,14 @@ static int icl_get_qgv_points(struct intel_display *display,
 		case INTEL_DRAM_LPDDR4:
 		case INTEL_DRAM_LPDDR5:
 			qi->t_bl = 16;
-			qi->max_numchannels = 8;
+			/*
+			 * Wa_16030862157
+			 * Xe3p supports a fully-populated 16-channel LPDDR
+			 * config (4 memory controllers x 4 channels); earlier
+			 * D14+ platforms top out at 8.
+			 */
+			qi->max_numchannels =
+				intel_display_wa(display, INTEL_DISPLAY_WA_16030862157) ? 16 : 8;
 			qi->channel_width = 16;
 			qi->deinterleave = 4;
 			break;
@@ -624,10 +632,16 @@ static int tgl_get_bw_info(struct intel_display *display,
 
 	ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids / num_channels);
 	/*
+	 * Wa_16030862157
 	 * clperchgroup = 4kpagespermempage * clperchperblock,
-	 * clperchperblock = 8 / num_channels * interleave
+	 * clperchperblock = max(8 / num_channels, 1) * interleave
+	 *
+	 * The 8 / num_channels truncating divide collapses to 0 for
+	 * >8-channel configs (16-channel: 8 / 16 = 0); the max(..., 1) floor
+	 * keeps clperchperblock >= 1 there while preserving the literal
+	 * truncating divide for <=8-channel configs.
 	 */
-	clperchgroup = 4 * (8 / num_channels) * qi.deinterleave;
+	clperchgroup = 4 * max(8 / num_channels, 1) * qi.deinterleave;
 
 	display->bw.num_qgv_points = qi.num_qgv_points;
 	display->bw.num_psf_gv_points = qi.num_psf_points;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index f103f7cba018..7e2fc24e240c 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -13,6 +13,7 @@
 #include "intel_display_core.h"
 #include "intel_display_utils.h"
 #include "intel_display_regs.h"
+#include "intel_display_wa.h"
 #include "intel_dram.h"
 #include "intel_mchbar.h"
 #include "intel_parent.h"
@@ -796,6 +797,17 @@ static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info
 	dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
 	/* PSF GV points not supported in D14+ */
 
+	/*
+	 * Wa_16030862157
+	 * MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits and
+	 * cannot encode 16, so on Xe3p the BIOS programs the saturated field
+	 * value (0xf) to indicate the fully-populated 16-channel config (4
+	 * memory controllers x 4 channels). Interpret it as 16.
+	 */
+	if (intel_display_wa(display, INTEL_DISPLAY_WA_16030862157) &&
+	    dram_info->num_channels == REG_FIELD_MAX(MTL_N_OF_POPULATED_CH_MASK))
+		dram_info->num_channels = 16;
+
 	if (DISPLAY_VER(display) >= 35)
 		dram_info->ecc_impacting_de_bw = REG_FIELD_GET(XE3P_ECC_IMPACTING_DE, val);
 
-- 
2.50.1


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* Re: [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16
  2026-07-15 10:41 ` [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16 Uma Shankar
@ 2026-07-15 12:30   ` Govindapillai, Vinod
  2026-07-15 13:27     ` Shankar, Uma
  0 siblings, 1 reply; 10+ messages in thread
From: Govindapillai, Vinod @ 2026-07-15 12:30 UTC (permalink / raw)
  To: Shankar, Uma, intel-xe@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org
  Cc: Kandpal, Suraj

Hi Uma,

On Wed, 2026-07-15 at 16:11 +0530, Uma Shankar wrote:
> The register MEM_SS_INFO_GLOBAL [Number of populated channels] field
> definition is updated with an encoding for 16 channels.
> 
> For 16-channel configuration, program 1111b. A programmed value of
> 1111b
> must be interpreted as 16 channels for memory bandwidth calculations.
> 
> The MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits and
> cannot
> encode 16, so on Xe3p the BIOS programs the saturated field value
> (0xf)
> to indicate the fully-populated 16-channel config (4 memory
> controllers
> x 4 channels). Interpret it as 16 and let the bandwidth math handle
> the
> larger channel count.
> 
> Gate the behaviour through
> intel_display_wa(INTEL_DISPLAY_WA_16030862157)
> instead of an open-coded DISPLAY_VER() check.
> 
> v2: Switched to intel_display_wa.c framework (Suraj)
> 
> WA: 16030862157
> Bspec: 69131, 68859
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c   | 20 +++++++++++++++++---
>  drivers/gpu/drm/i915/display/intel_dram.c | 12 ++++++++++++
>  2 files changed, 29 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index 41539fdfeac5..aaa0350dca78 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -14,6 +14,7 @@
>  #include "intel_display_regs.h"
>  #include "intel_display_types.h"
>  #include "intel_display_utils.h"
> +#include "intel_display_wa.h"
>  #include "intel_dram.h"
>  #include "intel_mchbar.h"
>  #include "intel_parent.h"
> @@ -272,7 +273,14 @@ static int icl_get_qgv_points(struct
> intel_display *display,
>  		case INTEL_DRAM_LPDDR4:
>  		case INTEL_DRAM_LPDDR5:
>  			qi->t_bl = 16;
> -			qi->max_numchannels = 8;
> +			/*
> +			 * Wa_16030862157
> +			 * Xe3p supports a fully-populated 16-
> channel LPDDR
> +			 * config (4 memory controllers x 4
> channels); earlier
> +			 * D14+ platforms top out at 8.
> +			 */
> +			qi->max_numchannels =
> +				intel_display_wa(display,
> INTEL_DISPLAY_WA_16030862157) ? 16 : 8;

As per the bspec 68859, max channel of 16 v. 8 is based on a specific
sku. Do we have any further info on that how to variate that?

But the INTEL_DISPLAY_WA_16030862157 applies to display versions >= 35 

In tgl_get_bw_info(), we have this adjustment to the deinterleave

	if (num_channels < qi.max_numchannels && DISPLAY_VER(display)
>= 12)
		qi.deinterleave = max(qi.deinterleave / 2, 1);

So with the above change we will always end up in this loop and adjust
the qi.deinterleave for all versions >= 35 not just the specific "sku"
which I think is not correct. May be need to check from the IP team or
clarify/update the bspec?

And another suggestion for your consideration is:

I didnt find this 1603862157 as part of wa database. Is there any wa
bspec? So do we need to  implement this as a wa?

If this is considered as a wa:

If I understand this correctly, wa is mainly about part where bios
populate the MTL_N_OF_POPULATED_CH_MASK fields as 0xf in cased of
channels 16 and we interpret that as channels = 16 instead of 15.  

IMO, ideally it is better to split this into two parts, 

1. wa definitions in the existing driver wa framework + changes in
xelpdp_get_dram_info() related to this wa as a single patch like other
wa implementations in the driver so far.

2. Update the bw info changes to add support for max_number of channels
to 16 in case of a specific SKU and the update to the
c9_clperchperblock calculation part.

BR
Vinod


>  			qi->channel_width = 16;
>  			qi->deinterleave = 4;
>  			break;
> @@ -624,10 +632,16 @@ static int tgl_get_bw_info(struct intel_display
> *display,
>  
>  	ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids
> / num_channels);
>  	/*
> +	 * Wa_16030862157
>  	 * clperchgroup = 4kpagespermempage * clperchperblock,
> -	 * clperchperblock = 8 / num_channels * interleave
> +	 * clperchperblock = max(8 / num_channels, 1) * interleave
> +	 *
> +	 * The 8 / num_channels truncating divide collapses to 0 for
> +	 * >8-channel configs (16-channel: 8 / 16 = 0); the max(...,
> 1) floor
> +	 * keeps clperchperblock >= 1 there while preserving the
> literal
> +	 * truncating divide for <=8-channel configs.
>  	 */
> -	clperchgroup = 4 * (8 / num_channels) * qi.deinterleave;
> +	clperchgroup = 4 * max(8 / num_channels, 1) *
> qi.deinterleave;
>  
>  	display->bw.num_qgv_points = qi.num_qgv_points;
>  	display->bw.num_psf_gv_points = qi.num_psf_points;
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c
> b/drivers/gpu/drm/i915/display/intel_dram.c
> index f103f7cba018..7e2fc24e240c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -13,6 +13,7 @@
>  #include "intel_display_core.h"
>  #include "intel_display_utils.h"
>  #include "intel_display_regs.h"
> +#include "intel_display_wa.h"
>  #include "intel_dram.h"
>  #include "intel_mchbar.h"
>  #include "intel_parent.h"
> @@ -796,6 +797,17 @@ static int xelpdp_get_dram_info(struct
> intel_display *display, struct dram_info
>  	dram_info->num_qgv_points =
> REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
>  	/* PSF GV points not supported in D14+ */
>  
> +	/*
> +	 * Wa_16030862157
> +	 * MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits
> and
> +	 * cannot encode 16, so on Xe3p the BIOS programs the
> saturated field
> +	 * value (0xf) to indicate the fully-populated 16-channel
> config (4
> +	 * memory controllers x 4 channels). Interpret it as 16.
> +	 */
> +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16030862157)
> &&
> +	    dram_info->num_channels ==
> REG_FIELD_MAX(MTL_N_OF_POPULATED_CH_MASK))
> +		dram_info->num_channels = 16;
> +
>  	if (DISPLAY_VER(display) >= 35)
>  		dram_info->ecc_impacting_de_bw =
> REG_FIELD_GET(XE3P_ECC_IMPACTING_DE, val);
>  


^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16
  2026-07-15 12:30   ` Govindapillai, Vinod
@ 2026-07-15 13:27     ` Shankar, Uma
  0 siblings, 0 replies; 10+ messages in thread
From: Shankar, Uma @ 2026-07-15 13:27 UTC (permalink / raw)
  To: Govindapillai, Vinod, intel-xe@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org
  Cc: Kandpal, Suraj



> -----Original Message-----
> From: Govindapillai, Vinod <vinod.govindapillai@intel.com>
> Sent: Wednesday, July 15, 2026 6:01 PM
> To: Shankar, Uma <uma.shankar@intel.com>; intel-xe@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>
> Subject: Re: [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16
> 
> Hi Uma,
> 
> On Wed, 2026-07-15 at 16:11 +0530, Uma Shankar wrote:
> > The register MEM_SS_INFO_GLOBAL [Number of populated channels] field
> > definition is updated with an encoding for 16 channels.
> >
> > For 16-channel configuration, program 1111b. A programmed value of
> > 1111b must be interpreted as 16 channels for memory bandwidth
> > calculations.
> >
> > The MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits and
> > cannot encode 16, so on Xe3p the BIOS programs the saturated field
> > value
> > (0xf)
> > to indicate the fully-populated 16-channel config (4 memory
> > controllers x 4 channels). Interpret it as 16 and let the bandwidth
> > math handle the larger channel count.
> >
> > Gate the behaviour through
> > intel_display_wa(INTEL_DISPLAY_WA_16030862157)
> > instead of an open-coded DISPLAY_VER() check.
> >
> > v2: Switched to intel_display_wa.c framework (Suraj)
> >
> > WA: 16030862157
> > Bspec: 69131, 68859
> > Assisted-by: Claude:claude-opus-4-8
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_bw.c   | 20 +++++++++++++++++---
> >  drivers/gpu/drm/i915/display/intel_dram.c | 12 ++++++++++++
> >  2 files changed, 29 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> > b/drivers/gpu/drm/i915/display/intel_bw.c
> > index 41539fdfeac5..aaa0350dca78 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -14,6 +14,7 @@
> >  #include "intel_display_regs.h"
> >  #include "intel_display_types.h"
> >  #include "intel_display_utils.h"
> > +#include "intel_display_wa.h"
> >  #include "intel_dram.h"
> >  #include "intel_mchbar.h"
> >  #include "intel_parent.h"
> > @@ -272,7 +273,14 @@ static int icl_get_qgv_points(struct
> > intel_display *display,
> >  		case INTEL_DRAM_LPDDR4:
> >  		case INTEL_DRAM_LPDDR5:
> >  			qi->t_bl = 16;
> > -			qi->max_numchannels = 8;
> > +			/*
> > +			 * Wa_16030862157
> > +			 * Xe3p supports a fully-populated 16-
> > channel LPDDR
> > +			 * config (4 memory controllers x 4
> > channels); earlier
> > +			 * D14+ platforms top out at 8.
> > +			 */
> > +			qi->max_numchannels =
> > +				intel_display_wa(display,
> > INTEL_DISPLAY_WA_16030862157) ? 16 : 8;
> 
> As per the bspec 68859, max channel of 16 v. 8 is based on a specific sku. Do we
> have any further info on that how to variate that?
> 
> But the INTEL_DISPLAY_WA_16030862157 applies to display versions >= 35
> 
> In tgl_get_bw_info(), we have this adjustment to the deinterleave
> 
> 	if (num_channels < qi.max_numchannels && DISPLAY_VER(display)
> >= 12)
> 		qi.deinterleave = max(qi.deinterleave / 2, 1);
> 
> So with the above change we will always end up in this loop and adjust the
> qi.deinterleave for all versions >= 35 not just the specific "sku"
> which I think is not correct. May be need to check from the IP team or
> clarify/update the bspec?

This is extended for all NVL SKU's, hence the check. However will drop > so that
its restricted only for NVL.

> And another suggestion for your consideration is:
> 
> I didnt find this 1603862157 as part of wa database. Is there any wa bspec? So do
> we need to  implement this as a wa?

This is the WA lineage number which XE driver and bspec follows, hence used the same
here.

> If this is considered as a wa:
> 
> If I understand this correctly, wa is mainly about part where bios populate the
> MTL_N_OF_POPULATED_CH_MASK fields as 0xf in cased of channels 16 and
> we interpret that as channels = 16 instead of 15.
> 
> IMO, ideally it is better to split this into two parts,
> 
> 1. wa definitions in the existing driver wa framework + changes in
> xelpdp_get_dram_info() related to this wa as a single patch like other wa
> implementations in the driver so far.
> 
> 2. Update the bw info changes to add support for max_number of channels to 16 in
> case of a specific SKU and the update to the c9_clperchperblock calculation part.

Sure, sounds good. I will change accordingly.

Regards,
Uma Shankar

> BR
> Vinod
> 
> 
> >  			qi->channel_width = 16;
> >  			qi->deinterleave = 4;
> >  			break;
> > @@ -624,10 +632,16 @@ static int tgl_get_bw_info(struct intel_display
> > *display,
> >
> >  	ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids /
> > num_channels);
> >  	/*
> > +	 * Wa_16030862157
> >  	 * clperchgroup = 4kpagespermempage * clperchperblock,
> > -	 * clperchperblock = 8 / num_channels * interleave
> > +	 * clperchperblock = max(8 / num_channels, 1) * interleave
> > +	 *
> > +	 * The 8 / num_channels truncating divide collapses to 0 for
> > +	 * >8-channel configs (16-channel: 8 / 16 = 0); the max(...,
> > 1) floor
> > +	 * keeps clperchperblock >= 1 there while preserving the
> > literal
> > +	 * truncating divide for <=8-channel configs.
> >  	 */
> > -	clperchgroup = 4 * (8 / num_channels) * qi.deinterleave;
> > +	clperchgroup = 4 * max(8 / num_channels, 1) *
> > qi.deinterleave;
> >
> >  	display->bw.num_qgv_points = qi.num_qgv_points;
> >  	display->bw.num_psf_gv_points = qi.num_psf_points; diff --git
> > a/drivers/gpu/drm/i915/display/intel_dram.c
> > b/drivers/gpu/drm/i915/display/intel_dram.c
> > index f103f7cba018..7e2fc24e240c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dram.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> > @@ -13,6 +13,7 @@
> >  #include "intel_display_core.h"
> >  #include "intel_display_utils.h"
> >  #include "intel_display_regs.h"
> > +#include "intel_display_wa.h"
> >  #include "intel_dram.h"
> >  #include "intel_mchbar.h"
> >  #include "intel_parent.h"
> > @@ -796,6 +797,17 @@ static int xelpdp_get_dram_info(struct
> > intel_display *display, struct dram_info
> >  	dram_info->num_qgv_points =
> > REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
> >  	/* PSF GV points not supported in D14+ */
> >
> > +	/*
> > +	 * Wa_16030862157
> > +	 * MEM_SS_INFO_GLOBAL populated-channel field is only 4 bits
> > and
> > +	 * cannot encode 16, so on Xe3p the BIOS programs the
> > saturated field
> > +	 * value (0xf) to indicate the fully-populated 16-channel
> > config (4
> > +	 * memory controllers x 4 channels). Interpret it as 16.
> > +	 */
> > +	if (intel_display_wa(display, INTEL_DISPLAY_WA_16030862157)
> > &&
> > +	    dram_info->num_channels ==
> > REG_FIELD_MAX(MTL_N_OF_POPULATED_CH_MASK))
> > +		dram_info->num_channels = 16;
> > +
> >  	if (DISPLAY_VER(display) >= 35)
> >  		dram_info->ecc_impacting_de_bw =
> > REG_FIELD_GET(XE3P_ECC_IMPACTING_DE, val);
> >


^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ Xe.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
                   ` (2 preceding siblings ...)
  2026-07-15 10:41 ` [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16 Uma Shankar
@ 2026-07-15 11:05 ` Patchwork
  2026-07-15 11:19 ` ✓ i915.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 11:05 UTC (permalink / raw)
  To: Uma Shankar; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 964 bytes --]

== Series Details ==

Series: drm/i915/display: Implement Display Wa_16030862157
URL   : https://patchwork.freedesktop.org/series/170472/
State : success

== Summary ==

CI Bug Log - changes from xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531_BAT -> xe-pw-170472v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531 -> xe-pw-170472v1

  IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531: 6dd678fdc2f39062bed466d7e3c851736e376531
  xe-pw-170472v1: 170472v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170472v1/index.html

[-- Attachment #2: Type: text/html, Size: 1512 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ i915.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
                   ` (3 preceding siblings ...)
  2026-07-15 11:05 ` ✓ Xe.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157 Patchwork
@ 2026-07-15 11:19 ` Patchwork
  2026-07-15 11:23 ` ✓ Xe.CI.FULL: " Patchwork
  2026-07-15 12:12 ` ✓ i915.CI.Full: " Patchwork
  6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 11:19 UTC (permalink / raw)
  To: Uma Shankar; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 1111 bytes --]

== Series Details ==

Series: drm/i915/display: Implement Display Wa_16030862157
URL   : https://patchwork.freedesktop.org/series/170473/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_18827 -> Patchwork_170473v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_170473v1/index.html

Participating hosts (41 -> 38)
------------------------------

  Missing    (3): bat-dg2-13 fi-snb-2520m bat-adls-6 


Changes
-------

  No changes found


Build changes
-------------

  * Linux: CI_DRM_18827 -> Patchwork_170473v1

  CI-20190529: 20190529
  CI_DRM_18827: 6dd678fdc2f39062bed466d7e3c851736e376531 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_170473v1: 6dd678fdc2f39062bed466d7e3c851736e376531 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_170473v1/index.html

[-- Attachment #2: Type: text/html, Size: 1676 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ Xe.CI.FULL: success for drm/i915/display: Implement Display Wa_16030862157
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
                   ` (4 preceding siblings ...)
  2026-07-15 11:19 ` ✓ i915.CI.BAT: " Patchwork
@ 2026-07-15 11:23 ` Patchwork
  2026-07-15 12:12 ` ✓ i915.CI.Full: " Patchwork
  6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 11:23 UTC (permalink / raw)
  To: Uma Shankar; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 964 bytes --]

== Series Details ==

Series: drm/i915/display: Implement Display Wa_16030862157
URL   : https://patchwork.freedesktop.org/series/170472/
State : success

== Summary ==

CI Bug Log - changes from xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531_FULL -> xe-pw-170472v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531 -> xe-pw-170472v1

  IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5409-6dd678fdc2f39062bed466d7e3c851736e376531: 6dd678fdc2f39062bed466d7e3c851736e376531
  xe-pw-170472v1: 170472v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-170472v1/index.html

[-- Attachment #2: Type: text/html, Size: 1512 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ i915.CI.Full: success for drm/i915/display: Implement Display Wa_16030862157
  2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
                   ` (5 preceding siblings ...)
  2026-07-15 11:23 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-07-15 12:12 ` Patchwork
  6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-15 12:12 UTC (permalink / raw)
  To: Uma Shankar; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 1114 bytes --]

== Series Details ==

Series: drm/i915/display: Implement Display Wa_16030862157
URL   : https://patchwork.freedesktop.org/series/170473/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_18827_full -> Patchwork_170473v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: CI_DRM_18827 -> Patchwork_170473v1

  CI-20190529: 20190529
  CI_DRM_18827: 6dd678fdc2f39062bed466d7e3c851736e376531 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_9006: 6380a8af26359dd222e22679442272ded836c463 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_170473v1: 6dd678fdc2f39062bed466d7e3c851736e376531 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_170473v1/index.html

[-- Attachment #2: Type: text/html, Size: 1677 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-07-15 13:27 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-15 10:41 [v2 0/2] drm/i915/display: Implement Display Wa_16030862157 Uma Shankar
2026-07-15 10:29 ` ✓ CI.KUnit: success for " Patchwork
2026-07-15 10:41 ` [v2 1/2] drm/i915/display: Add Wa_16030862157 to the display workaround list Uma Shankar
2026-07-15 10:41 ` [v2 2/2] drm/i915/dram: Interpret 0xF populated-channel count as 16 Uma Shankar
2026-07-15 12:30   ` Govindapillai, Vinod
2026-07-15 13:27     ` Shankar, Uma
2026-07-15 11:05 ` ✓ Xe.CI.BAT: success for drm/i915/display: Implement Display Wa_16030862157 Patchwork
2026-07-15 11:19 ` ✓ i915.CI.BAT: " Patchwork
2026-07-15 11:23 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-15 12:12 ` ✓ i915.CI.Full: " Patchwork

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