* [PATCH] QEMU KVM: i386: Fix the cpu reset state [not found] <i386_cpu_reset> @ 2009-06-04 21:29 ` Nitin A Kamble 0 siblings, 0 replies; 4+ messages in thread From: Nitin A Kamble @ 2009-06-04 21:29 UTC (permalink / raw) To: qemu-devel; +Cc: kvm, avi, jan.kiszka, Nitin A Kamble As per the IA32 processor manual, the accessed bit is set to 1 in the processor state after reset. qemu pc cpu_reset code was missing this accessed bit setting. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> --- target-i386/helper.c | 18 ++++++++++++------ 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index 7fc5366..573fb5b 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -493,17 +493,23 @@ void cpu_reset(CPUX86State *env) env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | + DESC_R_MASK | DESC_A_MASK); cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); env->eip = 0xfff0; env->regs[R_EDX] = env->cpuid_version; -- 1.6.0.6 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] QEMU KVM: i386: Fix the cpu reset state @ 2009-06-04 21:29 ` Nitin A Kamble 0 siblings, 0 replies; 4+ messages in thread From: Nitin A Kamble @ 2009-06-04 21:29 UTC (permalink / raw) To: qemu-devel; +Cc: jan.kiszka, avi, kvm, Nitin A Kamble As per the IA32 processor manual, the accessed bit is set to 1 in the processor state after reset. qemu pc cpu_reset code was missing this accessed bit setting. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> --- target-i386/helper.c | 18 ++++++++++++------ 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index 7fc5366..573fb5b 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -493,17 +493,23 @@ void cpu_reset(CPUX86State *env) env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | + DESC_R_MASK | DESC_A_MASK); cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | + DESC_A_MASK); env->eip = 0xfff0; env->regs[R_EDX] = env->cpuid_version; -- 1.6.0.6 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] QEMU KVM: i386: Fix the cpu reset state 2009-06-04 21:29 ` [Qemu-devel] " Nitin A Kamble @ 2009-06-06 7:46 ` Jan Kiszka -1 siblings, 0 replies; 4+ messages in thread From: Jan Kiszka @ 2009-06-06 7:46 UTC (permalink / raw) To: Nitin A Kamble; +Cc: qemu-devel, kvm, Avi Kivity [-- Attachment #1: Type: text/plain, Size: 2324 bytes --] Nitin A Kamble wrote: > As per the IA32 processor manual, the accessed bit is set to 1 in the > processor state after reset. qemu pc cpu_reset code was missing this > accessed bit setting. > > Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> > --- > target-i386/helper.c | 18 ++++++++++++------ > 1 files changed, 12 insertions(+), 6 deletions(-) > > diff --git a/target-i386/helper.c b/target-i386/helper.c > index 7fc5366..573fb5b 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -493,17 +493,23 @@ void cpu_reset(CPUX86State *env) > env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); > > cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | > + DESC_R_MASK | DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > > env->eip = 0xfff0; > env->regs[R_EDX] = env->cpuid_version; Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Thanks, Jan [-- Attachment #2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 257 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] Re: [PATCH] QEMU KVM: i386: Fix the cpu reset state @ 2009-06-06 7:46 ` Jan Kiszka 0 siblings, 0 replies; 4+ messages in thread From: Jan Kiszka @ 2009-06-06 7:46 UTC (permalink / raw) To: Nitin A Kamble; +Cc: qemu-devel, kvm, Avi Kivity [-- Attachment #1: Type: text/plain, Size: 2324 bytes --] Nitin A Kamble wrote: > As per the IA32 processor manual, the accessed bit is set to 1 in the > processor state after reset. qemu pc cpu_reset code was missing this > accessed bit setting. > > Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> > --- > target-i386/helper.c | 18 ++++++++++++------ > 1 files changed, 12 insertions(+), 6 deletions(-) > > diff --git a/target-i386/helper.c b/target-i386/helper.c > index 7fc5366..573fb5b 100644 > --- a/target-i386/helper.c > +++ b/target-i386/helper.c > @@ -493,17 +493,23 @@ void cpu_reset(CPUX86State *env) > env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); > > cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | > + DESC_R_MASK | DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, > - DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); > + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | > + DESC_A_MASK); > > env->eip = 0xfff0; > env->regs[R_EDX] = env->cpuid_version; Acked-by: Jan Kiszka <jan.kiszka@siemens.com> Thanks, Jan [-- Attachment #2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 257 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
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[not found] <i386_cpu_reset>
2009-06-04 21:29 ` [PATCH] QEMU KVM: i386: Fix the cpu reset state Nitin A Kamble
2009-06-04 21:29 ` [Qemu-devel] " Nitin A Kamble
2009-06-06 7:46 ` Jan Kiszka
2009-06-06 7:46 ` [Qemu-devel] " Jan Kiszka
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