AMD extended migration CPU masks: why only on CPU 0?

AMD extended migration CPU masks: why only on CPU 0?

[Tim Deegan]

Hi Travis, 

In c/s 18402, the CPUID masks are only set once, on CPU 0.  Can you
explain why this doesn't have to happen on every core, or at least every
socket?  The white paper doesn't discuss it. 

Cheers,

Tim.

-- 
Tim Deegan <Tim.Deegan@citrix.com>
Principal Software Engineer, XenServer Engineering
Citrix Systems UK Ltd.  (Company #02937203, SL9 0BG)

Re: AMD extended migration CPU masks: why only on CPU 0?

[Wei Huang]

[-- Attachment #1: Type: text/plain, Size: 757 bytes --]

Tim,

The (extended) CPUID mask MSRs are associated with each core. They need 
to be updated on each core if migration happens across CPUs. Changset 
18402 does update the MSRs for each core. But printk() only happens on 
core 0. If you move printk() statements below wrmsr(), you will see it 
been called on each core.

It is hard to justify which way is better. I attach the patch anyway, in 
case Keir or you want it for xen-unstable.

Signed-off-by: Wei Huang <wei.huang2@amd.com>

Best,
-Wei




Tim Deegan wrote:
> Hi Travis, 
>
> In c/s 18402, the CPUID masks are only set once, on CPU 0.  Can you
> explain why this doesn't have to happen on every core, or at least every
> socket?  The white paper doesn't discuss it. 
>
> Cheers,
>
> Tim.
>
>   


[-- Attachment #2: amd_cpu_feature_mask_printk.patch --]
[-- Type: text/x-patch, Size: 873 bytes --]

diff -r 83a6621b91bf xen/arch/x86/cpu/amd.c
--- a/xen/arch/x86/cpu/amd.c	Wed Feb 10 09:20:56 2010 +0000
+++ b/xen/arch/x86/cpu/amd.c	Fri Feb 19 14:22:04 2010 -0600
@@ -131,10 +131,6 @@
 	}
 
 	status = set_mask;
-	printk("Writing CPUID feature mask ECX:EDX -> %08Xh:%08Xh\n", 
-	       feat_ecx, feat_edx);
-	printk("Writing CPUID extended feature mask ECX:EDX -> %08Xh:%08Xh\n", 
-	       extfeat_ecx, extfeat_edx);
 
  setmask:
 	/* FIXME check if processor supports CPUID masking */
@@ -146,6 +142,10 @@
 		wrmsr_amd(MSR_K8_FEATURE_MASK, feat_edx, feat_ecx);
 		wrmsr_amd(MSR_K8_EXT_FEATURE_MASK, extfeat_edx, extfeat_ecx);
 	}
+        printk("Writing CPUID feature mask ECX:EDX -> %08Xh:%08Xh\n", 
+               feat_ecx, feat_edx);
+        printk("Writing CPUID extended feature mask ECX:EDX -> %08Xh:%08Xh\n", 
+               extfeat_ecx, extfeat_edx);
 }
 
 /*

[-- Attachment #3: Type: text/plain, Size: 138 bytes --]

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Re: AMD extended migration CPU masks: why only on CPU 0?

[Tim Deegan]

Hi, 

At 20:27 +0000 on 19 Feb (1266611232), Wei Huang wrote:
> The (extended) CPUID mask MSRs are associated with each core. They need 
> to be updated on each core if migration happens across CPUs. Changset 
> 18402 does update the MSRs for each core.

Oh, so it does. :)  My mistake; sorry for the noise.

Cheers,

Tim.

-- 
Tim Deegan <Tim.Deegan@citrix.com>
Principal Software Engineer, XenServer Engineering
Citrix Systems UK Ltd.  (Company #02937203, SL9 0BG)