* 64 bit PCI BAR
@ 2010-11-04 5:51 Ron Rondis
0 siblings, 0 replies; only message in thread
From: Ron Rondis @ 2010-11-04 5:51 UTC (permalink / raw)
To: linux-kernel
Hi,
The following section, from PCI spec, explain the mechanism for getting
64 bit region size.
"64-bit (memory) Base Address registers can be handled the same, except
that the second
32-bit register is considered an extension of the first; i.e., bits
32-63. Software writes
0FFFFFFFFh to both registers, reads them back, and combines the result
into a 64-bit value.
Size calculation is done on the 64-bit value."
In pci/proce.c the implementation is:
read low bar
write ~0 to low bar
read low bar
write low bar
read high bar
write ~0 to high bar
read high bar
write high bar
Can someone explain the conflict between the spec and the implementation?
Please add me to CC.
Thanks,
Ron
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2010-11-04 5:51 64 bit PCI BAR Ron Rondis
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