[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Inderpal Singh]

1. After wake-up, the system-wide flags register loses its value.
   Hence, write the address of secondary startup function to
   successfully boot the secondary CPU.

2. Fix to remove the "Unknown IPI message 0x1" message when
   secondary CPU boots.

Signed-off-by: Inderpal Singh <inderpal.s@samsung.com>
---
 arch/arm/mach-exynos4/platsmp.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 6d35878..11234c7 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -100,11 +100,17 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	write_pen_release(cpu);
 
 	/*
+	 * After wake-up, the system-wide flags register loses its value.
+	 * Hence, write the address of secondary startup function again.
+	 */ 
+	 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
+
+	/*
 	 * Send the secondary CPU a soft interrupt, thereby causing
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	smp_cross_call(cpumask_of(cpu), 1);
+	smp_send_reschedule(cpu);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.1

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Inderpal Singh]

1. After wake-up, the system-wide flags register loses its value.
   Hence, write the address of secondary startup function to
   successfully boot the secondary CPU.

2. Fix to remove the "Unknown IPI message 0x1" message when
   secondary CPU boots.

Signed-off-by: Inderpal Singh <inderpal.s@samsung.com>
---
 arch/arm/mach-exynos4/platsmp.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 6d35878..11234c7 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -100,11 +100,17 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	write_pen_release(cpu);
 
 	/*
+	 * After wake-up, the system-wide flags register loses its value.
+	 * Hence, write the address of secondary startup function again.
+	 */ 
+	 __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
+
+	/*
 	 * Send the secondary CPU a soft interrupt, thereby causing
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	smp_cross_call(cpumask_of(cpu), 1);
+	smp_send_reschedule(cpu);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.1

Re: [PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Santosh Shilimkar]

On 5/30/2011 2:43 PM, Inderpal Singh wrote:
[...]

> 2. Fix to remove the "Unknown IPI message 0x1" message when
>     secondary CPU boots.
>
For this one you are avoiding a wakeup IPI and rather
relying on schedule IPI. That just avoiding the issue.

This doesn't seems to be right. Refer below thread.

http://www.spinics.net/lists/arm-kernel/msg110886.html

Russell,
When do you plan to fix the SGI usage as discussed
in above thread. I thought SGI1 usage was ok for OMAP,
realview/versatile and MSM.

Regards
Santosh

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Santosh Shilimkar]

On 5/30/2011 2:43 PM, Inderpal Singh wrote:
[...]

> 2. Fix to remove the "Unknown IPI message 0x1" message when
>     secondary CPU boots.
>
For this one you are avoiding a wakeup IPI and rather
relying on schedule IPI. That just avoiding the issue.

This doesn't seems to be right. Refer below thread.

http://www.spinics.net/lists/arm-kernel/msg110886.html

Russell,
When do you plan to fix the SGI usage as discussed
in above thread. I thought SGI1 usage was ok for OMAP,
realview/versatile and MSM.

Regards
Santosh

Re: [PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Russell King - ARM Linux]

On Mon, May 30, 2011 at 03:08:17PM +0530, Santosh Shilimkar wrote:
> When do you plan to fix the SGI usage as discussed
> in above thread. I thought SGI1 usage was ok for OMAP,
> realview/versatile and MSM.

I'd like the use of the arbitary SGI1 to fade away, to be replaced with
something a little saner (eg, SGI0 being the first SGI).  That just
means you'll end up with a warning about SGI0 instead.  Let's just
ignore them for the time being (but please change to SGI0 anyway.)

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Russell King - ARM Linux]

On Mon, May 30, 2011 at 03:08:17PM +0530, Santosh Shilimkar wrote:
> When do you plan to fix the SGI usage as discussed
> in above thread. I thought SGI1 usage was ok for OMAP,
> realview/versatile and MSM.

I'd like the use of the arbitary SGI1 to fade away, to be replaced with
something a little saner (eg, SGI0 being the first SGI).  That just
means you'll end up with a warning about SGI0 instead.  Let's just
ignore them for the time being (but please change to SGI0 anyway.)

Re: [PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Santosh Shilimkar]

On 5/31/2011 3:24 AM, Russell King - ARM Linux wrote:
> On Mon, May 30, 2011 at 03:08:17PM +0530, Santosh Shilimkar wrote:
>> When do you plan to fix the SGI usage as discussed
>> in above thread. I thought SGI1 usage was ok for OMAP,
>> realview/versatile and MSM.
>
> I'd like the use of the arbitary SGI1 to fade away, to be replaced with
> something a little saner (eg, SGI0 being the first SGI).  That just
> means you'll end up with a warning about SGI0 instead.  Let's just
> ignore them for the time being (but please change to SGI0 anyway.)

I mean SGIO. SGI1 was typo. Ignoring that warning isn't good idea.
Platforms which do aggressive CPU offline/online, will keep
getting this noise and hence need to be fixed.

How about my patch which was marking this as a wakeup
IPI instead of unknown one. Ofcourse with wakeup SGI
being used will be SGI0 instead of current SGI1.

If you are ok with it I can send an RFC patch ?

Regards
Santosh

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Santosh Shilimkar]

On 5/31/2011 3:24 AM, Russell King - ARM Linux wrote:
> On Mon, May 30, 2011 at 03:08:17PM +0530, Santosh Shilimkar wrote:
>> When do you plan to fix the SGI usage as discussed
>> in above thread. I thought SGI1 usage was ok for OMAP,
>> realview/versatile and MSM.
>
> I'd like the use of the arbitary SGI1 to fade away, to be replaced with
> something a little saner (eg, SGI0 being the first SGI).  That just
> means you'll end up with a warning about SGI0 instead.  Let's just
> ignore them for the time being (but please change to SGI0 anyway.)

I mean SGIO. SGI1 was typo. Ignoring that warning isn't good idea.
Platforms which do aggressive CPU offline/online, will keep
getting this noise and hence need to be fixed.

How about my patch which was marking this as a wakeup
IPI instead of unknown one. Ofcourse with wakeup SGI
being used will be SGI0 instead of current SGI1.

If you are ok with it I can send an RFC patch ?

Regards
Santosh

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Inderpal Singh]

1. After wake-up, the system-wide flags register loses its value.
   Hence, write the address of secondary startup function to
   successfully boot the secondary CPU.

2. Changes SGI1 to SGI0 for secondary CPU boot up

Signed-off-by: Inderpal Singh <inderpal.s@samsung.com>
---
1. The below patch is mandatory to boot secondary CPU after wake-up from sleep
http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/4850

2. The change SGI1 to SGI0 for secondary CPU boot up is done as discussed 
at following link
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/4877

 arch/arm/mach-exynos4/platsmp.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index c5e65a0..061260c 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -101,11 +101,18 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	write_pen_release(cpu);
 
 	/*
+	* After wake-up, the system-wide flags register loses its value.
+	* Hence, write the address of secondary startup function again.
+	*/ 
+	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
+
+
+	/*
 	 * Send the secondary CPU a soft interrupt, thereby causing
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	gic_raise_softirq(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 0);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.1

[PATCH] ARM: EXYNOS4: Fix secondary CPU boot after wake-up

[Inderpal Singh]

1. After wake-up, the system-wide flags register loses its value.
   Hence, write the address of secondary startup function to
   successfully boot the secondary CPU.

2. Changes SGI1 to SGI0 for secondary CPU boot up

Signed-off-by: Inderpal Singh <inderpal.s@samsung.com>
---
1. The below patch is mandatory to boot secondary CPU after wake-up from sleep
http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/4850

2. The change SGI1 to SGI0 for secondary CPU boot up is done as discussed 
at following link
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/4877

 arch/arm/mach-exynos4/platsmp.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index c5e65a0..061260c 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -101,11 +101,18 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	write_pen_release(cpu);
 
 	/*
+	* After wake-up, the system-wide flags register loses its value.
+	* Hence, write the address of secondary startup function again.
+	*/ 
+	__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
+
+
+	/*
 	 * Send the secondary CPU a soft interrupt, thereby causing
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	gic_raise_softirq(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 0);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
-- 
1.7.1