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From: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com>
To: Avi Kivity <avi@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>,
	LKML <linux-kernel@vger.kernel.org>, KVM <kvm@vger.kernel.org>
Subject: [PATCH v4 14/18] KVM: MMU: do not need atomicly to set/clear spte
Date: Tue, 12 Jul 2011 03:31:28 +0800	[thread overview]
Message-ID: <4E1B4F90.90101@cn.fujitsu.com> (raw)
In-Reply-To: <4E1B4CF8.605@cn.fujitsu.com>

Now, the spte is just from nonprsent to present or present to nonprsent, so
we can use some trick to set/clear spte non-atomicly as linux kernel does

Signed-off-by: Xiao Guangrong <xiaoguangrong@cn.fujitsu.com>
---
 arch/x86/kvm/mmu.c |   86 +++++++++++++++++++++++++++++++++++++++++++---------
 1 files changed, 71 insertions(+), 15 deletions(-)

diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 982718f..a22b5fe 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -259,26 +259,82 @@ static gfn_t pse36_gfn_delta(u32 gpte)
 	return (gpte & PT32_DIR_PSE36_MASK) << shift;
 }
 
+#ifdef CONFIG_X86_64
 static void __set_spte(u64 *sptep, u64 spte)
 {
-	set_64bit(sptep, spte);
+	*sptep = spte;
 }
 
-static u64 __xchg_spte(u64 *sptep, u64 new_spte)
+static void __update_clear_spte_fast(u64 *sptep, u64 spte)
 {
-#ifdef CONFIG_X86_64
-	return xchg(sptep, new_spte);
+	*sptep = spte;
+}
+
+static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
+{
+	return xchg(sptep, spte);
+}
 #else
-	u64 old_spte;
+union split_spte {
+	struct {
+		u32 spte_low;
+		u32 spte_high;
+	};
+	u64 spte;
+};
 
-	do {
-		old_spte = *sptep;
-	} while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
+static void __set_spte(u64 *sptep, u64 spte)
+{
+	union split_spte *ssptep, sspte;
 
-	return old_spte;
-#endif
+	ssptep = (union split_spte *)sptep;
+	sspte = (union split_spte)spte;
+
+	ssptep->spte_high = sspte.spte_high;
+
+	/*
+	 * If we map the spte from nonpresent to present, We should store
+	 * the high bits firstly, then set present bit, so cpu can not
+	 * fetch this spte while we are setting the spte.
+	 */
+	smp_wmb();
+
+	ssptep->spte_low = sspte.spte_low;
 }
 
+static void __update_clear_spte_fast(u64 *sptep, u64 spte)
+{
+	union split_spte *ssptep, sspte;
+
+	ssptep = (union split_spte *)sptep;
+	sspte = (union split_spte)spte;
+
+	ssptep->spte_low = sspte.spte_low;
+
+	/*
+	 * If we map the spte from present to nonpresent, we should clear
+	 * present bit firstly to avoid vcpu fetch the old high bits.
+	 */
+	smp_wmb();
+
+	ssptep->spte_high = sspte.spte_high;
+}
+
+static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
+{
+	union split_spte *ssptep, sspte, orig;
+
+	ssptep = (union split_spte *)sptep;
+	sspte = (union split_spte)spte;
+
+	/* xchg acts as a barrier before the setting of the high bits */
+	orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
+	orig.spte_high = ssptep->spte_high = sspte.spte_high;
+
+	return orig.spte;
+}
+#endif
+
 static bool spte_has_volatile_bits(u64 spte)
 {
 	if (!shadow_accessed_mask)
@@ -330,9 +386,9 @@ static void mmu_spte_update(u64 *sptep, u64 new_spte)
 		mask |= shadow_dirty_mask;
 
 	if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
-		__set_spte(sptep, new_spte);
+		__update_clear_spte_fast(sptep, new_spte);
 	else
-		old_spte = __xchg_spte(sptep, new_spte);
+		old_spte = __update_clear_spte_slow(sptep, new_spte);
 
 	if (!shadow_accessed_mask)
 		return;
@@ -354,9 +410,9 @@ static int mmu_spte_clear_track_bits(u64 *sptep)
 	u64 old_spte = *sptep;
 
 	if (!spte_has_volatile_bits(old_spte))
-		__set_spte(sptep, 0ull);
+		__update_clear_spte_fast(sptep, 0ull);
 	else
-		old_spte = __xchg_spte(sptep, 0ull);
+		old_spte = __update_clear_spte_slow(sptep, 0ull);
 
 	if (!is_rmap_spte(old_spte))
 		return 0;
@@ -376,7 +432,7 @@ static int mmu_spte_clear_track_bits(u64 *sptep)
  */
 static void mmu_spte_clear_no_track(u64 *sptep)
 {
-	__set_spte(sptep, 0ull);
+	__update_clear_spte_fast(sptep, 0ull);
 }
 
 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
-- 
1.7.5.4


  parent reply	other threads:[~2011-07-11 19:29 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-11 19:20 [PATCH v4 00/18] KVM: optimize for MMIO handled Xiao Guangrong
2011-07-11 19:21 ` [PATCH v4 01/18] KVM: MMU: fix walking shadow page table Xiao Guangrong
2011-07-11 19:22 ` [PATCH v4 02/18] KVM: MMU: do not update slot bitmap if spte is nonpresent Xiao Guangrong
2011-07-11 19:22 ` [PATCH v4 03/18] KVM: x86: introduce vcpu_mmio_gva_to_gpa to cleanup the code Xiao Guangrong
2011-07-11 19:23 ` [PATCH v4 04/18] KVM: MMU: cache mmio info on page fault path Xiao Guangrong
2011-07-11 19:24 ` [PATCH v4 05/18] KVM: MMU: optimize to handle dirty bit Xiao Guangrong
2011-07-11 19:25 ` [PATCH v4 06/18] KVM: MMU: cleanup for FNAME(fetch) Xiao Guangrong
2011-07-11 19:25 ` [PATCH v4 07/18] KVM: MMU: rename 'pt_write' to 'emulate' Xiao Guangrong
2011-07-11 19:26 ` [PATCH v4 08/18] KVM: MMU: count used shadow pages on prepareing path Xiao Guangrong
2011-07-11 19:27 ` [PATCH v4 09/18] KVM: MMU: split kvm_mmu_free_page Xiao Guangrong
2011-07-11 19:28 ` [PATCH v4 10/18] KVM: MMU: remove bypass_guest_pf Xiao Guangrong
2011-07-11 19:28 ` [PATCH v4 11/18] KVM: MMU: filter out the mmio pfn from the fault pfn Xiao Guangrong
2011-07-11 19:29 ` [PATCH v4 12/18] KVM: MMU: abstract some functions to handle " Xiao Guangrong
2011-07-11 19:30 ` [PATCH v4 13/18] KVM: MMU: introduce the rules to modify shadow page table Xiao Guangrong
2011-07-11 19:31 ` Xiao Guangrong [this message]
2011-07-11 19:32 ` [PATCH v4 15/18] KVM: MMU: lockless walking " Xiao Guangrong
2011-07-11 19:32 ` [PATCH v4 16/18] KVM: MMU: reorganize struct kvm_shadow_walk_iterator Xiao Guangrong
2011-07-11 19:33 ` [PATCH v4 17/18] KVM: MMU: mmio page fault support Xiao Guangrong
2011-07-12 20:00   ` [PATCH] KVM: x86: Apply required parentheses in __check_direct_spte_mmio_pf Jan Kiszka
2011-07-13 13:25     ` Avi Kivity
2011-07-11 19:34 ` [PATCH v4 18/18] KVM: MMU: trace mmio page fault Xiao Guangrong
2011-07-12  8:39 ` [PATCH v4 00/18] KVM: optimize for MMIO handled Avi Kivity

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