From: Mark Langsdorf <mark.langsdorf@calxeda.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "i.mitsyanko@gmail.com" <i.mitsyanko@gmail.com>,
"edgar.iglesias@gmail.com" <edgar.iglesias@gmail.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Rob Herring <rob.herring@calxeda.com>,
"afaerber@suse.de" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank
Date: Wed, 18 Jan 2012 15:32:47 -0600 [thread overview]
Message-ID: <4F173A7F.7070100@calxeda.com> (raw)
In-Reply-To: <CAFEAcA8NJhWprXdSWjuOEebCbzHbNK6+3Drt8wX7b7AK=8p7Zg@mail.gmail.com>
On 01/18/2012 01:26 PM, Peter Maydell wrote:
> On 18 January 2012 19:06, Mark Langsdorf <mark.langsdorf@calxeda.com> wrote:
>> On 01/18/2012 08:53 AM, Peter Maydell wrote:
>>> On 18 January 2012 14:35, Mark Langsdorf <mark.langsdorf@calxeda.com> wrote:
>>>> I can set the smp_loader code so that I can boot 2 cpus
>>>> and verify their existence in /proc/cpuinfo, but I can't
>>>> get 3 cpus to boot at all, no matter how I hack the existing
>>>> arm_boot code.
>>>
>>> Right, multiple secondary cores requires multiple addresses
>>> to be polled which we don't support in arm_boot.c at the moment.
>>
>> How would multiple polling supposed to work?
>
> You need several separate bits of code, to put each secondary
> core in a different loop polling a different address.
> (If you have access to your own bootloader sources you should
> be able to see how it does it :-))
I wasn't sure if polling was done on the QEMU side. I can
pull code from the bootloader.
>> I've tried changing
>> http://lxr.linux.no/#linux+v3.2.1/arch/arm/mach-highbank/highbank.c#L71
>> to point to a fixed address (0x50), and the boot loader still fails
>> if there are 2 or more secondary CPUs.
>
> Yeah, that's insufficient, because the highbank kernel doesn't
>
>> I've figured out that do_cpu_reset() is only called once, even
>> though that seems a bit strange to me.
>
> It should be called once per core -- we register it with
> qemu_register_reset() for each core at the bottom of arm_load_kernel().
> The reason it isn't in your case is a bug in highbank.c -- you should
> be passing first_cpu as the first parameter to arm_load_kernel().
As it turns out, the highbank simulation will boot all 4 cores
if I make the change to pass first_cpu and change the Linux code
to use 0x40 for all 4 CPUs. Which is gratifying if a little
surprising.
With that straightened out, I can go work on translating
the polling code to opcodes. Thanks for the pointers.
--Mark Langsdorf
Calxeda, Inc.
next prev parent reply other threads:[~2012-01-18 21:32 UTC|newest]
Thread overview: 147+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-05 20:02 [Qemu-devel] [PATCH 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-06 15:37 ` Peter Maydell
2012-01-05 20:02 ` [Qemu-devel] [PATCH 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 4/5] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-06 16:29 ` Peter Maydell
2012-01-06 16:58 ` Mark Langsdorf
2012-01-06 17:04 ` Peter Maydell
2012-01-06 17:34 ` Mark Langsdorf
2012-01-06 17:46 ` Peter Maydell
2012-01-06 21:16 ` Mark Langsdorf
2012-01-07 3:20 ` Peter Maydell
2012-01-06 18:09 ` Andreas Färber
2012-01-06 18:37 ` Igor Mitsyanko
2012-01-06 18:45 ` Peter Maydell
2012-01-06 19:10 ` Igor Mitsyanko
2012-01-06 20:11 ` Andreas Färber
2012-01-07 3:14 ` Peter Maydell
2012-01-07 4:18 ` Andreas Färber
2012-01-07 9:55 ` Igor Mitsyanko
2012-01-07 9:40 ` Andreas Färber
2012-01-06 18:48 ` Rob Herring
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:52 ` Edgar E. Iglesias
2012-01-09 16:59 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v4 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 11:22 ` Andreas Färber
2012-01-09 16:59 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH 6/6] arm: Remove incorrect and misleading comment in arm_timer Mark Langsdorf
2012-01-10 12:45 ` Andreas Färber
2012-01-10 15:35 ` Peter Maydell
2012-01-10 18:00 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:34 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-10 17:47 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 17:44 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 17:55 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 18:04 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-10 17:52 ` Peter Maydell
2012-01-10 18:03 ` Andreas Färber
2012-01-10 18:18 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 0/6] " Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 4:12 ` Andreas Färber
2012-01-11 10:56 ` Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 15:50 ` Peter Maydell
2012-01-13 23:27 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 15:40 ` Andreas Färber
2012-01-11 15:54 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-11 15:56 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 22:47 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-12 12:47 ` Mitsyanko Igor
2012-01-12 13:09 ` Andreas Färber
2012-01-12 13:42 ` Mitsyanko Igor
2012-01-12 13:46 ` Peter Maydell
2012-01-12 13:58 ` Mitsyanko Igor
2012-01-12 17:51 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 22:41 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-13 12:14 ` Peter Maydell
2012-01-13 14:15 ` Andreas Färber
2012-01-13 14:18 ` Alexander Graf
2012-01-13 14:31 ` Andreas Färber
2012-01-13 14:35 ` Alexander Graf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-17 15:13 ` Peter Maydell
2012-01-18 14:35 ` Mark Langsdorf
2012-01-18 14:53 ` Peter Maydell
2012-01-18 15:04 ` Mark Langsdorf
2012-01-18 15:11 ` Peter Maydell
2012-01-18 15:50 ` [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-18 16:23 ` Peter Maydell
2012-01-18 19:06 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-18 19:26 ` Peter Maydell
2012-01-18 19:33 ` Peter Maydell
2012-01-18 21:32 ` Mark Langsdorf [this message]
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 5/5] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 4/6] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-19 17:19 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 19:15 ` Peter Maydell
2012-01-19 19:25 ` Mark Langsdorf
2012-01-19 19:32 ` Peter Maydell
2012-01-19 19:35 ` Mark Langsdorf
2012-01-19 19:44 ` Peter Maydell
2012-01-19 19:58 ` Mark Langsdorf
2012-01-19 19:59 ` Peter Maydell
2012-01-19 20:48 ` Mark Langsdorf
2012-01-19 20:00 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 1/4] Add xgmac ethernet model Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 2/4] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 3/4] arm: add secondary cpu boot callbacks to arm_boot.c Mark Langsdorf
2012-01-19 21:31 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 21:44 ` Peter Maydell
2012-01-19 23:17 ` Rob Herring
2012-01-19 23:41 ` John Williams
2012-01-20 8:47 ` Peter Maydell
2012-01-20 13:48 ` Rob Herring
2012-01-20 13:57 ` Peter Maydell
2012-01-20 18:27 ` Grant Likely
2012-01-21 2:39 ` Peter Maydell
2012-01-23 16:32 ` [Qemu-devel] Adding -dtb option to qemu Grant Likely
2012-01-20 16:25 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-20 16:27 ` Peter Maydell
2012-01-20 16:57 ` Mark Langsdorf
2012-01-20 16:58 ` Peter Maydell
2012-01-20 19:25 ` Mark Langsdorf
2012-01-21 2:35 ` Peter Maydell
2012-01-20 18:25 ` Grant Likely
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