From: "Andreas Färber" <afaerber@suse.de>
To: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: i.mitsyanko@gmail.com, peter.maydell@linaro.org,
qemu-devel@nongnu.org, edgar.iglesias@gmail.com
Subject: Re: [Qemu-devel] [PATCH v7 2/6] arm: make the number of GIC interrupts configurable
Date: Wed, 11 Jan 2012 05:12:46 +0100 [thread overview]
Message-ID: <4F0D0C3E.8080706@suse.de> (raw)
In-Reply-To: <1326227599-5257-3-git-send-email-mark.langsdorf@calxeda.com>
Am 10.01.2012 21:33, schrieb Mark Langsdorf:
> Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
> and create a configurable property for each defaulting to 96 and 64
> (respectively) so that device modelers can set the value appropriately
> for their SoC. Other ARM processors also set their maximum number of
> used IRQs appropriately.
>
> Set the maximum theoretical number of GIC interrupts to 1020 and
> update the save/restore code to only use the appropriate number for
> each SoC.
>
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
> ---
> Changes from v6
> Removed trailing whitespace
> armv7m_nvic uses num_irq properly
> Some comments changed
> Changes from v5
> Clarify the commit message
> Rename GIC_NIRQ to GIC_MAXIRQ and change usage slightly
> Makes num-irq to uint32_t in all cases
> Clarify the error message
> Clarify documentation on the num-irq qdev property use in all files
> Changes from v4
> None
> Changes from v3
> Increase maximum number of GIC interrupts to 1020
> Remove SoC/implementation specific GIC_NIRQ #defs
> Added properties code to arm11mp
> Changed error handling for too many interrupts
> Redid save/load handling
> Changes from v2
> Skipped
> Changes from v1
> Increase the number of a9mp interrupts to 192
> Add a property defaulting to 96
> Add a num_irq member in the gic state structure
> Use the num_irq value as appropriate
> Add num_irq argument to gic_init()
> Add num_irq to various CPU calls to gic_init
>
> hw/a9mpcore.c | 13 +++++++--
> hw/arm11mpcore.c | 17 ++++++++----
> hw/arm_gic.c | 68 +++++++++++++++++++++++++++++-----------------------
> hw/armv7m_nvic.c | 30 ++++++++++++++++++-----
> hw/realview_gic.c | 7 ++++-
> 5 files changed, 87 insertions(+), 48 deletions(-)
> diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c
> index bf8c3c5..befdc16 100644
> --- a/hw/armv7m_nvic.c
> +++ b/hw/armv7m_nvic.c
> @@ -384,16 +382,34 @@ static int armv7m_nvic_init(SysBusDevice *dev)
> {
> nvic_state *s= FROM_SYSBUSGIC(nvic_state, dev);
>
> - gic_init(&s->gic);
> + /* note that for the M profile gic_init() takes the number of external
> + * interrupt lines only.
> + */
> + gic_init(&s->gic, s->num_irq);
> memory_region_add_subregion(get_system_memory(), 0xe000e000, &s->gic.iomem);
> s->systick.timer = qemu_new_timer_ns(vm_clock, systick_timer_tick, s);
> vmstate_register(&dev->qdev, -1, &vmstate_nvic, s);
This should probably be removed now that you register it through
sysbus_register_withprop() below.
> return 0;
> }
>
> +static SysBusDeviceInfo armv7m_nvic_priv_info = {
> + .init = armv7m_nvic_init,
> + .qdev.name = "armv7m_nvic",
> + .qdev.size = sizeof(nvic_state),
> + .qdev.vmsd = &vmstate_nvic,
Minor nit: Assignment is inconsistent - add a space here?
> + .qdev.props = (Property[]) {
> + /* The ARM v7m may have anything from 0 to 496 external interrupt
> + * IRQ lines. We default to 64 external and 32 internal
> + * Other boards may differ and should set this property appropriately.
> + */
> + DEFINE_PROP_UINT32("num-irq", nvic_state, num_irq, 64),
> + DEFINE_PROP_END_OF_LIST(),
> + }
> +};
> +
> static void armv7m_nvic_register_devices(void)
> {
> - sysbus_register_dev("armv7m_nvic", sizeof(nvic_state), armv7m_nvic_init);
> + sysbus_register_withprop(&armv7m_nvic_priv_info);
> }
>
> device_init(armv7m_nvic_register_devices)
I'm still wondering whether the num-irq property calls for a version
bump somewhere. My thinking is no, since the SysBus device will not be
user-created from the command line and therefore effectively has the
same values as hardcoded before; but in that case we should assert this
by setting .qdev.no_user = 1.
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2012-01-11 4:14 UTC|newest]
Thread overview: 147+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-05 20:02 [Qemu-devel] [PATCH 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-06 15:37 ` Peter Maydell
2012-01-05 20:02 ` [Qemu-devel] [PATCH 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 4/5] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-06 16:29 ` Peter Maydell
2012-01-06 16:58 ` Mark Langsdorf
2012-01-06 17:04 ` Peter Maydell
2012-01-06 17:34 ` Mark Langsdorf
2012-01-06 17:46 ` Peter Maydell
2012-01-06 21:16 ` Mark Langsdorf
2012-01-07 3:20 ` Peter Maydell
2012-01-06 18:09 ` Andreas Färber
2012-01-06 18:37 ` Igor Mitsyanko
2012-01-06 18:45 ` Peter Maydell
2012-01-06 19:10 ` Igor Mitsyanko
2012-01-06 20:11 ` Andreas Färber
2012-01-07 3:14 ` Peter Maydell
2012-01-07 4:18 ` Andreas Färber
2012-01-07 9:55 ` Igor Mitsyanko
2012-01-07 9:40 ` Andreas Färber
2012-01-06 18:48 ` Rob Herring
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:52 ` Edgar E. Iglesias
2012-01-09 16:59 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v4 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 11:22 ` Andreas Färber
2012-01-09 16:59 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH 6/6] arm: Remove incorrect and misleading comment in arm_timer Mark Langsdorf
2012-01-10 12:45 ` Andreas Färber
2012-01-10 15:35 ` Peter Maydell
2012-01-10 18:00 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:34 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-10 17:47 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 17:44 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 17:55 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 18:04 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-10 17:52 ` Peter Maydell
2012-01-10 18:03 ` Andreas Färber
2012-01-10 18:18 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 0/6] " Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 4:12 ` Andreas Färber [this message]
2012-01-11 10:56 ` Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 15:50 ` Peter Maydell
2012-01-13 23:27 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 15:40 ` Andreas Färber
2012-01-11 15:54 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-11 15:56 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 22:47 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-12 12:47 ` Mitsyanko Igor
2012-01-12 13:09 ` Andreas Färber
2012-01-12 13:42 ` Mitsyanko Igor
2012-01-12 13:46 ` Peter Maydell
2012-01-12 13:58 ` Mitsyanko Igor
2012-01-12 17:51 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 22:41 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-13 12:14 ` Peter Maydell
2012-01-13 14:15 ` Andreas Färber
2012-01-13 14:18 ` Alexander Graf
2012-01-13 14:31 ` Andreas Färber
2012-01-13 14:35 ` Alexander Graf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-17 15:13 ` Peter Maydell
2012-01-18 14:35 ` Mark Langsdorf
2012-01-18 14:53 ` Peter Maydell
2012-01-18 15:04 ` Mark Langsdorf
2012-01-18 15:11 ` Peter Maydell
2012-01-18 15:50 ` [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-18 16:23 ` Peter Maydell
2012-01-18 19:06 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-18 19:26 ` Peter Maydell
2012-01-18 19:33 ` Peter Maydell
2012-01-18 21:32 ` Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 5/5] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 4/6] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-19 17:19 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 19:15 ` Peter Maydell
2012-01-19 19:25 ` Mark Langsdorf
2012-01-19 19:32 ` Peter Maydell
2012-01-19 19:35 ` Mark Langsdorf
2012-01-19 19:44 ` Peter Maydell
2012-01-19 19:58 ` Mark Langsdorf
2012-01-19 19:59 ` Peter Maydell
2012-01-19 20:48 ` Mark Langsdorf
2012-01-19 20:00 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 1/4] Add xgmac ethernet model Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 2/4] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 3/4] arm: add secondary cpu boot callbacks to arm_boot.c Mark Langsdorf
2012-01-19 21:31 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 21:44 ` Peter Maydell
2012-01-19 23:17 ` Rob Herring
2012-01-19 23:41 ` John Williams
2012-01-20 8:47 ` Peter Maydell
2012-01-20 13:48 ` Rob Herring
2012-01-20 13:57 ` Peter Maydell
2012-01-20 18:27 ` Grant Likely
2012-01-21 2:39 ` Peter Maydell
2012-01-23 16:32 ` [Qemu-devel] Adding -dtb option to qemu Grant Likely
2012-01-20 16:25 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-20 16:27 ` Peter Maydell
2012-01-20 16:57 ` Mark Langsdorf
2012-01-20 16:58 ` Peter Maydell
2012-01-20 19:25 ` Mark Langsdorf
2012-01-21 2:35 ` Peter Maydell
2012-01-20 18:25 ` Grant Likely
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