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From: Stephen Boyd <sboyd@codeaurora.org>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Nicolas Pitre <nico@fluxnic.net>,
	linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: [PATCH] ARM: cache-v7: Disable preemption when reading CCSIDR
Date: Thu, 02 Feb 2012 16:49:05 -0800	[thread overview]
Message-ID: <4F2B2F01.20601@codeaurora.org> (raw)
In-Reply-To: <20120203003633.GD14129@n2100.arm.linux.org.uk>

On 02/02/12 16:36, Russell King - ARM Linux wrote:
> On Thu, Feb 02, 2012 at 03:36:49PM -0800, Stephen Boyd wrote:
>> On 02/02/12 13:38, Nicolas Pitre wrote:
>>> On Thu, 2 Feb 2012, Russell King - ARM Linux wrote
>>>> On Thu, Feb 02, 2012 at 11:24:46AM -0800, Stephen Boyd wrote:
>>>>> Should we move get_thread_info into assembler.h? It seems odd
>>>>> to include entry-header.S but I saw that vfp was doing the same.
>>>> Probably yes, and probably also have preempt_disable and preempt_enable
>>>> assembler macros.  That's going to get rather icky if we have to
>>>> explicitly call the scheduler though (to solve (1)).
>>> What about a pair of helpers written in C instead?
>>>
>>> v7_flush_dcache_all() could be renamed, and a wrapper function called 
>>> v7_flush_dcache_all() would call the preemption disable helper, call the 
>>> former v7_flush_dcache_all code, then call the preemption enable helper.
>>>
>>> Then __v7_setup() could still call the core cache flush code without 
>>> issues.
>> I tried to put the preemption disable/enable right around the place
>> where it was needed. With this approach we would disable preemption
>> during the entire cache flush. I'm not sure if we want to make this
>> function worse for performance, do we? It certainly sounds easier than
>> writing all the preempt macros in assembly though.
> Err, why do you think it's a big task?
>
> preempt disable is a case of incrementing the thread preempt count, while
> preempt enable is a case of decrementing it, testing for zero, if zero,
> then checking whether TIF_NEED_RESCHED is set and calling a function.
>
> If that's too much, then the simple method in assembly to quickly disable
> preemption over a very few set of instructions is using mrs/msr and cpsid i.
> That'll be far cheaper than fiddling about with preempt counters or
> messing about with veneers in C code.

I'll try the macros. So far it isn't bad, just the __v7_setup to resolve.

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: cache-v7: Disable preemption when reading CCSIDR
Date: Thu, 02 Feb 2012 16:49:05 -0800	[thread overview]
Message-ID: <4F2B2F01.20601@codeaurora.org> (raw)
In-Reply-To: <20120203003633.GD14129@n2100.arm.linux.org.uk>

On 02/02/12 16:36, Russell King - ARM Linux wrote:
> On Thu, Feb 02, 2012 at 03:36:49PM -0800, Stephen Boyd wrote:
>> On 02/02/12 13:38, Nicolas Pitre wrote:
>>> On Thu, 2 Feb 2012, Russell King - ARM Linux wrote
>>>> On Thu, Feb 02, 2012 at 11:24:46AM -0800, Stephen Boyd wrote:
>>>>> Should we move get_thread_info into assembler.h? It seems odd
>>>>> to include entry-header.S but I saw that vfp was doing the same.
>>>> Probably yes, and probably also have preempt_disable and preempt_enable
>>>> assembler macros.  That's going to get rather icky if we have to
>>>> explicitly call the scheduler though (to solve (1)).
>>> What about a pair of helpers written in C instead?
>>>
>>> v7_flush_dcache_all() could be renamed, and a wrapper function called 
>>> v7_flush_dcache_all() would call the preemption disable helper, call the 
>>> former v7_flush_dcache_all code, then call the preemption enable helper.
>>>
>>> Then __v7_setup() could still call the core cache flush code without 
>>> issues.
>> I tried to put the preemption disable/enable right around the place
>> where it was needed. With this approach we would disable preemption
>> during the entire cache flush. I'm not sure if we want to make this
>> function worse for performance, do we? It certainly sounds easier than
>> writing all the preempt macros in assembly though.
> Err, why do you think it's a big task?
>
> preempt disable is a case of incrementing the thread preempt count, while
> preempt enable is a case of decrementing it, testing for zero, if zero,
> then checking whether TIF_NEED_RESCHED is set and calling a function.
>
> If that's too much, then the simple method in assembly to quickly disable
> preemption over a very few set of instructions is using mrs/msr and cpsid i.
> That'll be far cheaper than fiddling about with preempt counters or
> messing about with veneers in C code.

I'll try the macros. So far it isn't bad, just the __v7_setup to resolve.

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.

  reply	other threads:[~2012-02-03  0:49 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-02 19:24 [PATCH] ARM: cache-v7: Disable preemption when reading CCSIDR Stephen Boyd
2012-02-02 19:24 ` Stephen Boyd
2012-02-02 20:44 ` Russell King - ARM Linux
2012-02-02 20:44   ` Russell King - ARM Linux
2012-02-02 21:38   ` Nicolas Pitre
2012-02-02 21:38     ` Nicolas Pitre
2012-02-02 23:36     ` Stephen Boyd
2012-02-02 23:36       ` Stephen Boyd
2012-02-03  0:36       ` Russell King - ARM Linux
2012-02-03  0:36         ` Russell King - ARM Linux
2012-02-03  0:49         ` Stephen Boyd [this message]
2012-02-03  0:49           ` Stephen Boyd
2012-02-03  1:18           ` Nicolas Pitre
2012-02-03  1:18             ` Nicolas Pitre
2012-02-03  1:18             ` Nicolas Pitre
2012-02-03  2:03             ` Stephen Boyd
2012-02-03  2:03               ` Stephen Boyd
2012-02-03  2:35               ` Nicolas Pitre
2012-02-03  2:35                 ` Nicolas Pitre
2012-02-03  2:37                 ` Stephen Boyd
2012-02-03  2:37                   ` Stephen Boyd
2012-02-03  3:04                   ` Nicolas Pitre
2012-02-03  3:04                     ` Nicolas Pitre
2012-02-03 11:15                     ` Sergei Shtylyov
2012-02-03 11:15                       ` Sergei Shtylyov
2012-02-04 18:00               ` Catalin Marinas
2012-02-04 18:00                 ` Catalin Marinas
2012-02-13 17:54               ` Rabin Vincent
2012-02-13 17:54                 ` Rabin Vincent
2012-02-13 18:09                 ` Nicolas Pitre
2012-02-13 18:09                   ` Nicolas Pitre
2012-02-13 18:13                   ` Stephen Boyd
2012-02-13 18:13                     ` Stephen Boyd
2012-02-13 18:15                     ` Russell King - ARM Linux
2012-02-13 18:15                       ` Russell King - ARM Linux
2012-02-13 22:23                       ` Stephen Boyd
2012-02-13 22:23                         ` Stephen Boyd
2012-02-13 23:29                         ` Russell King - ARM Linux
2012-02-13 23:29                           ` Russell King - ARM Linux
2012-02-14 14:15                           ` Rabin Vincent
2012-02-14 14:15                             ` Rabin Vincent
2012-02-14 17:30                             ` Nicolas Pitre
2012-02-14 17:30                               ` Nicolas Pitre
2012-02-14 18:07                             ` Stephen Boyd
2012-02-14 18:07                               ` Stephen Boyd
2012-02-03  1:16         ` Nicolas Pitre
2012-02-03  1:16           ` Nicolas Pitre
2012-02-07  3:34         ` Saravana Kannan
2012-02-07  3:34           ` Saravana Kannan
2012-02-07 17:42           ` Stephen Boyd
2012-02-07 17:42             ` Stephen Boyd

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