From: Darren Hart <dvhart@linux.intel.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Tomoya MORINAGA <tomoya.rohm@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Feng Tang <feng.tang@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alan Cox <alan@linux.intel.com>,
linux-serial@vger.kernel.org
Subject: Re: [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter
Date: Wed, 22 Feb 2012 01:55:42 -0800 [thread overview]
Message-ID: <4F44BB9E.7060108@linux.intel.com> (raw)
In-Reply-To: <20120222085830.1ed8c25e@pyramind.ukuu.org.uk>
On 02/22/2012 12:58 AM, Alan Cox wrote:
>>> assume a 192 MHz clock on all boards. The problem with this approach is
>>> that the CLKCFG register may have been set to something other than the
>>> 192MHz configuration by the firmware.
>
> So you can use the early PCI hooks or even bash the register directly in
> your early bootup code. You won't be the only early boot console that
> does this sort of thing. There are even people bitbanging PCI I²C
> interfaces at boot time for such purpose.
>
>> So, I think default uart_clock 192MHz setting is better than Darren's opinion.
>
> It's certainly easier to maintain, but it would be good to know if the
> setting can be written or retrieved directly in the early console setup
> using the early PCI ops or similar.
OK, I'm not opposed to forcing everything to 192MHz, that would clean up
pch_uart.c quite a bit. I have heard different things about the
specification for this chipset. One statement was that 64MHz was the
maximum UART clock. Feng suggests that 192MHz is the recommended UART
clock. I need to dig up this spec and determine what it actually says.
I have V2 with Alan's feedback from 2/4 incorporated, but I'll hold off
unless people want to see it now. Seems like it will change a lot if we
force 192MHz everywhere.
--
Darren Hart
Intel Open Source Technology Center
Yocto Project - Linux Kernel
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WARNING: multiple messages have this Message-ID (diff)
From: Darren Hart <dvhart@linux.intel.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Tomoya MORINAGA <tomoya.rohm@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Feng Tang <feng.tang@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alan Cox <alan@linux.intel.com>,
linux-serial@vger.kernel.org
Subject: Re: [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter
Date: Wed, 22 Feb 2012 01:55:42 -0800 [thread overview]
Message-ID: <4F44BB9E.7060108@linux.intel.com> (raw)
In-Reply-To: <20120222085830.1ed8c25e@pyramind.ukuu.org.uk>
On 02/22/2012 12:58 AM, Alan Cox wrote:
>>> assume a 192 MHz clock on all boards. The problem with this approach is
>>> that the CLKCFG register may have been set to something other than the
>>> 192MHz configuration by the firmware.
>
> So you can use the early PCI hooks or even bash the register directly in
> your early bootup code. You won't be the only early boot console that
> does this sort of thing. There are even people bitbanging PCI I²C
> interfaces at boot time for such purpose.
>
>> So, I think default uart_clock 192MHz setting is better than Darren's opinion.
>
> It's certainly easier to maintain, but it would be good to know if the
> setting can be written or retrieved directly in the early console setup
> using the early PCI ops or similar.
OK, I'm not opposed to forcing everything to 192MHz, that would clean up
pch_uart.c quite a bit. I have heard different things about the
specification for this chipset. One statement was that 64MHz was the
maximum UART clock. Feng suggests that 192MHz is the recommended UART
clock. I need to dig up this spec and determine what it actually says.
I have V2 with Alan's feedback from 2/4 incorporated, but I'll hold off
unless people want to see it now. Seems like it will change a lot if we
force 192MHz everywhere.
--
Darren Hart
Intel Open Source Technology Center
Yocto Project - Linux Kernel
next prev parent reply other threads:[~2012-02-22 9:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-22 1:59 [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter Darren Hart
2012-02-22 1:59 ` [PATCH 1/4] pch_uart: Use uartclk instead of base_baud Darren Hart
2012-02-22 1:59 ` [PATCH 2/4] pch_uart: Add Fish River Island II uart clock quirks Darren Hart
2012-02-22 8:52 ` Alan Cox
2012-02-22 9:46 ` Darren Hart
2012-02-24 21:53 ` Greg Kroah-Hartman
2012-02-24 22:25 ` Darren Hart
2012-02-24 23:39 ` Greg Kroah-Hartman
2012-02-22 1:59 ` [PATCH 3/4] pch_uart: Add user_uartclk parameter Darren Hart
2012-02-22 1:59 ` [PATCH 4/4] pch_uart: Use existing default_baud in setup_console Darren Hart
2012-02-22 3:10 ` [PATCH 0/4] pch_uart: Cleanups, board quirks, and user uartclk parameter Tomoya MORINAGA
2012-02-22 3:36 ` Darren Hart
2012-02-22 4:26 ` Tomoya MORINAGA
2012-02-22 6:39 ` Darren Hart
2012-02-22 8:16 ` Tomoya MORINAGA
2012-02-22 8:59 ` Darren Hart
2012-02-22 9:25 ` Feng Tang
2012-02-22 8:58 ` Alan Cox
2012-02-22 9:55 ` Darren Hart [this message]
2012-02-22 9:55 ` Darren Hart
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