AMD SVM specification

AMD SVM specification

[Prateek Sharma]

Hello,
     I know this is not the right forum for this, but i am looking for
the recent specification/documentation of the AMD NPT and SVM
features. All i can find is the old pacifica document dating back to
2005, and only the NPT whitepaper.
    The reason i seek this documentation is that i wish to modify some
KVM code. Specifically, i am interested in how the hardware
sets/resets the accessed/dirty bits of the guest/nested tables
[https://lkml.org/lkml/2011/6/22/20]

Any help will be appreciated.

Prateek

Re: AMD SVM specification

[Andre Przywara]

On 02/27/2012 11:09 AM, Prateek Sharma wrote:
> Hello,
>       I know this is not the right forum for this, but i am looking for
> the recent specification/documentation of the AMD NPT and SVM
> features. All i can find is the old pacifica document dating back to
> 2005, and only the NPT whitepaper.

The technical SVM documentation is in the AMD64 Architecture 
Programmer's Manual (APM) Volume 2:
http://support.amd.com/us/Processor_TechDocs/24593_APM_v2.pdf

SVM is detailed in chapter 15, with appendix B & C containing the needed 
bits for the data structures. Other chapters in this document contain 
details about paging, though this is mostly not AMD specific.

Regards,
Andre.

>      The reason i seek this documentation is that i wish to modify some
> KVM code. Specifically, i am interested in how the hardware
> sets/resets the accessed/dirty bits of the guest/nested tables
> [https://lkml.org/lkml/2011/6/22/20]
>
> Any help will be appreciated.
>
> Prateek


-- 
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany