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From: Jon Hunter <jon-hunter@ti.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: linux-omap@vger.kernel.org, khilman@ti.com, paul@pwsan.com,
	Santosh Shilimkar <santosh.shilimkar@ti.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 15/19] ARM: OMAP4430: PM: workaround for DDR corruption on second CS
Date: Tue, 24 Apr 2012 13:22:14 -0500	[thread overview]
Message-ID: <4F96EF56.5020604@ti.com> (raw)
In-Reply-To: <1334914432-26456-16-git-send-email-t-kristo@ti.com>

Hi Tero,

On 04/20/2012 04:33 AM, Tero Kristo wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
> 
> Work around for Errata ID: i632 "LPDDR2 Corruption After OFF Mode
> Transition When CS1 Is Used On EMIF" which impacts OMAP443x silicon
> The issue occurs when EMIF_SDRAM_CONFIG is restored first before
> EMIF_SDRAM_CONFIG_2 is not yet restored, the register configuration
> is not set properly, we apply the required workaround allowing
> the restore sequence to work properly.
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> [t-kristo@ti.com: moved workaround from omap-sar.c to pm44xx.c]
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  .../include/mach/ctrl_module_wkup_44xx.h           |    2 +
>  arch/arm/mach-omap2/pm44xx.c                       |   24 ++++++++++++++++++++
>  2 files changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> index a0af9ba..b763a79 100644
> --- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> @@ -28,6 +28,8 @@
>  #define OMAP4_CTRL_MODULE_WKUP_IP_REVISION		0x0000
>  #define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO		0x0004
>  #define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG		0x0010
> +#define OMAP4_CTRL_SECURE_EMIF1_SDRAM_CONFIG2_REG	0x0114
> +#define OMAP4_CTRL_SECURE_EMIF2_SDRAM_CONFIG2_REG	0x011c
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0	0x0460
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1	0x0464
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2	0x0468
> diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
> index 0472921..d4d18d9 100644
> --- a/arch/arm/mach-omap2/pm44xx.c
> +++ b/arch/arm/mach-omap2/pm44xx.c
> @@ -17,6 +17,9 @@
>  #include <linux/err.h>
>  #include <linux/slab.h>
>  #include <asm/system_misc.h>
> +#include <linux/io.h>
> +
> +#include <mach/ctrl_module_wkup_44xx.h>
>  
>  #include "common.h"
>  #include "clockdomain.h"
> @@ -215,6 +218,27 @@ static int __init omap4_pm_init(void)
>  
>  	pr_err("Power Management for TI OMAP4.\n");
>  
> +	/*
> +	 * Work around for OMAP443x Errata i632: "LPDDR2 Corruption After OFF
> +	 * Mode Transition When CS1 Is Used On EMIF":
> +	 * Overwrite EMIF1/EMIF2
> +	 * SECURE_EMIF1_SDRAM_CONFIG2_REG
> +	 * SECURE_EMIF2_SDRAM_CONFIG2_REG
> +	 */
> +	if (cpu_is_omap443x()) {
> +		void __iomem *secure_ctrl_mod;
> +
> +		secure_ctrl_mod = ioremap(OMAP4_CTRL_MODULE_WKUP, SZ_4K);
> +		BUG_ON(!secure_ctrl_mod);
> +
> +		__raw_writel(0x10, secure_ctrl_mod +
> +			     OMAP4_CTRL_SECURE_EMIF1_SDRAM_CONFIG2_REG);
> +		__raw_writel(0x10, secure_ctrl_mod +
> +			     OMAP4_CTRL_SECURE_EMIF2_SDRAM_CONFIG2_REG);

According to the erratum description the above registers are used to
restore the EMIFx_SDRAM_CONFIG2 registers. So although the value 0x10,
maybe the value being used for EMIFx_SDRAM_CONFIG2 registers, shouldn't
we read the EMIFx_SDRAM_CONFIG2 registers and store them in the above
registers?

Cheers
Jon

WARNING: multiple messages have this Message-ID (diff)
From: jon-hunter@ti.com (Jon Hunter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 15/19] ARM: OMAP4430: PM: workaround for DDR corruption on second CS
Date: Tue, 24 Apr 2012 13:22:14 -0500	[thread overview]
Message-ID: <4F96EF56.5020604@ti.com> (raw)
In-Reply-To: <1334914432-26456-16-git-send-email-t-kristo@ti.com>

Hi Tero,

On 04/20/2012 04:33 AM, Tero Kristo wrote:
> From: Santosh Shilimkar <santosh.shilimkar@ti.com>
> 
> Work around for Errata ID: i632 "LPDDR2 Corruption After OFF Mode
> Transition When CS1 Is Used On EMIF" which impacts OMAP443x silicon
> The issue occurs when EMIF_SDRAM_CONFIG is restored first before
> EMIF_SDRAM_CONFIG_2 is not yet restored, the register configuration
> is not set properly, we apply the required workaround allowing
> the restore sequence to work properly.
> 
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> [t-kristo at ti.com: moved workaround from omap-sar.c to pm44xx.c]
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
>  .../include/mach/ctrl_module_wkup_44xx.h           |    2 +
>  arch/arm/mach-omap2/pm44xx.c                       |   24 ++++++++++++++++++++
>  2 files changed, 26 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> index a0af9ba..b763a79 100644
> --- a/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> +++ b/arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h
> @@ -28,6 +28,8 @@
>  #define OMAP4_CTRL_MODULE_WKUP_IP_REVISION		0x0000
>  #define OMAP4_CTRL_MODULE_WKUP_IP_HWINFO		0x0004
>  #define OMAP4_CTRL_MODULE_WKUP_IP_SYSCONFIG		0x0010
> +#define OMAP4_CTRL_SECURE_EMIF1_SDRAM_CONFIG2_REG	0x0114
> +#define OMAP4_CTRL_SECURE_EMIF2_SDRAM_CONFIG2_REG	0x011c
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_0	0x0460
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_1	0x0464
>  #define OMAP4_CTRL_MODULE_WKUP_CONF_DEBUG_SEL_TST_2	0x0468
> diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
> index 0472921..d4d18d9 100644
> --- a/arch/arm/mach-omap2/pm44xx.c
> +++ b/arch/arm/mach-omap2/pm44xx.c
> @@ -17,6 +17,9 @@
>  #include <linux/err.h>
>  #include <linux/slab.h>
>  #include <asm/system_misc.h>
> +#include <linux/io.h>
> +
> +#include <mach/ctrl_module_wkup_44xx.h>
>  
>  #include "common.h"
>  #include "clockdomain.h"
> @@ -215,6 +218,27 @@ static int __init omap4_pm_init(void)
>  
>  	pr_err("Power Management for TI OMAP4.\n");
>  
> +	/*
> +	 * Work around for OMAP443x Errata i632: "LPDDR2 Corruption After OFF
> +	 * Mode Transition When CS1 Is Used On EMIF":
> +	 * Overwrite EMIF1/EMIF2
> +	 * SECURE_EMIF1_SDRAM_CONFIG2_REG
> +	 * SECURE_EMIF2_SDRAM_CONFIG2_REG
> +	 */
> +	if (cpu_is_omap443x()) {
> +		void __iomem *secure_ctrl_mod;
> +
> +		secure_ctrl_mod = ioremap(OMAP4_CTRL_MODULE_WKUP, SZ_4K);
> +		BUG_ON(!secure_ctrl_mod);
> +
> +		__raw_writel(0x10, secure_ctrl_mod +
> +			     OMAP4_CTRL_SECURE_EMIF1_SDRAM_CONFIG2_REG);
> +		__raw_writel(0x10, secure_ctrl_mod +
> +			     OMAP4_CTRL_SECURE_EMIF2_SDRAM_CONFIG2_REG);

According to the erratum description the above registers are used to
restore the EMIFx_SDRAM_CONFIG2 registers. So although the value 0x10,
maybe the value being used for EMIFx_SDRAM_CONFIG2 registers, shouldn't
we read the EMIFx_SDRAM_CONFIG2 registers and store them in the above
registers?

Cheers
Jon

  reply	other threads:[~2012-04-24 18:22 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-04-20  9:33 [PATCH 00/19] ARM: OMAP4 device off support Tero Kristo
2012-04-20  9:33 ` Tero Kristo
2012-04-20  9:33 ` [PATCH 01/19] ARM: OMAP4: PM: save/restore all DPLL settings in OFF mode Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-23 16:09   ` Jon Hunter
2012-04-23 16:09     ` Jon Hunter
2012-04-25  7:33     ` Tero Kristo
2012-04-25  7:33       ` Tero Kristo
2012-04-25 15:12       ` Jon Hunter
2012-04-25 15:12         ` Jon Hunter
2012-05-04 19:22         ` Tony Lindgren
2012-05-04 19:22           ` Tony Lindgren
2012-05-02 10:10   ` Bedia, Vaibhav
2012-05-02 10:10     ` Bedia, Vaibhav
2012-05-02 10:18     ` Shilimkar, Santosh
2012-05-02 10:18       ` Shilimkar, Santosh
2012-05-02 10:55       ` Bedia, Vaibhav
2012-05-02 10:55         ` Bedia, Vaibhav
2012-05-02 11:00         ` Shilimkar, Santosh
2012-05-02 11:00           ` Shilimkar, Santosh
2012-05-02 11:40           ` Bedia, Vaibhav
2012-05-02 11:40             ` Bedia, Vaibhav
2012-05-02 11:46             ` Shilimkar, Santosh
2012-05-02 11:46               ` Shilimkar, Santosh
2012-05-02 11:55               ` Bedia, Vaibhav
2012-05-02 11:55                 ` Bedia, Vaibhav
2012-05-02 11:47             ` Menon, Nishanth
2012-05-02 11:47               ` Menon, Nishanth
2012-05-02 11:55               ` Bedia, Vaibhav
2012-05-02 11:55                 ` Bedia, Vaibhav
2012-05-02 11:58                 ` Shilimkar, Santosh
2012-05-02 11:58                   ` Shilimkar, Santosh
2012-05-02 12:10                   ` Bedia, Vaibhav
2012-05-02 12:10                     ` Bedia, Vaibhav
2012-04-20  9:33 ` [PATCH 02/19] ARM: OMAP4: PM: save/restore all CM1/2 " Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-05-09 23:27   ` Kevin Hilman
2012-05-09 23:27     ` Kevin Hilman
2012-05-11 14:30     ` Tero Kristo
2012-05-11 14:30       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 03/19] ARM: OMAP4: PM: powerdomain: Add HWSAR flag to L3INIT Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 04/19] ARM: OMAP4: Add SAR ROM base address Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 05/19] ARM: OMAP4: PM: Add SAR backup support towards device OFF Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 16:35   ` Tony Lindgren
2012-04-24 16:35     ` Tony Lindgren
2012-04-25  7:18     ` Tero Kristo
2012-04-25  7:18       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 06/19] ARM: OMAP4: Auto generate SAR layout contents Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 16:37   ` Tony Lindgren
2012-04-24 16:37     ` Tony Lindgren
2012-04-20  9:33 ` [PATCH 07/19] ARM: OMAP4: SAR: generate overwrite data based on SAR ROM contents Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 08/19] ARM: OMAP4: PM: Add device-off support Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 17:46   ` Jon Hunter
2012-04-24 17:46     ` Jon Hunter
2012-04-25  7:30     ` Tero Kristo
2012-04-25  7:30       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 09/19] ARM: OMAP4: PM: add errata support Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 17:50   ` Jon Hunter
2012-04-24 17:50     ` Jon Hunter
2012-04-25  7:31     ` Tero Kristo
2012-04-25  7:31       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 17:57   ` Jon Hunter
2012-04-24 17:57     ` Jon Hunter
2012-04-25  7:31     ` Tero Kristo
2012-04-25  7:31       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 12/19] ARM: OMAP4: PM: update ROM return address for OSWR and OFF Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 16:39   ` Tony Lindgren
2012-04-24 16:39     ` Tony Lindgren
2012-04-25  7:24     ` Tero Kristo
2012-04-25  7:24       ` Tero Kristo
2012-04-20  9:33 ` [PATCH 13/19] ARM: OMAP4: PM: Mark the PPI and SPI interrupts as non-secure for GP Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 14/19] ARM: OMAP4: wakeupgen: enable clocks for save_secure_all Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 15/19] ARM: OMAP4430: PM: workaround for DDR corruption on second CS Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-24 18:22   ` Jon Hunter [this message]
2012-04-24 18:22     ` Jon Hunter
2012-04-25  7:26     ` Tero Kristo
2012-04-25  7:26       ` Tero Kristo
2012-04-25  7:59       ` Shilimkar, Santosh
2012-04-25  7:59         ` Shilimkar, Santosh
2012-04-25 15:16       ` Jon Hunter
2012-04-25 15:16         ` Jon Hunter
2012-04-26  6:19         ` Shilimkar, Santosh
2012-04-26  6:19           ` Shilimkar, Santosh
2012-04-20  9:33 ` [PATCH 16/19] TEMP: ARM: OMAP4: prevent voltage transitions Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 17/19] ARM: OMAP4: put cpu1 back to sleep if no wake request Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 18/19] ARM: OMAP4460: wakeupgen: set GIC_CPU0 backup status flag always Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20  9:33 ` [PATCH 19/19] ARM: OMAP4: powerdomain: update mpu / core off counters during device off Tero Kristo
2012-04-20  9:33   ` Tero Kristo
2012-04-20 12:20 ` [PATCH 00/19] ARM: OMAP4 device off support T Krishnamoorthy, Balaji
2012-04-20 12:20   ` T Krishnamoorthy, Balaji
2012-04-20 12:58   ` Tero Kristo
2012-04-20 12:58     ` Tero Kristo
2012-04-20 13:55     ` Kevin Hilman
2012-04-20 13:55       ` Kevin Hilman
2012-04-20 14:43       ` Tero Kristo
2012-04-20 14:43         ` Tero Kristo
2012-04-20 14:51         ` Datta, Shubhrajyoti
2012-04-20 14:51           ` Datta, Shubhrajyoti
2012-04-20 15:07           ` Tero Kristo
2012-04-20 15:07             ` Tero Kristo
2012-04-23  6:28             ` Shubhrajyoti Datta
2012-04-23  6:28               ` Shubhrajyoti Datta
2012-05-09 22:46 ` Kevin Hilman
2012-05-09 22:46   ` Kevin Hilman
2012-05-09 23:14   ` Russell King - ARM Linux
2012-05-09 23:14     ` Russell King - ARM Linux
2012-05-10  9:47     ` Tero Kristo
2012-05-10  9:47       ` Tero Kristo

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