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* [PATCH 01/14] MIPS: make oprofile use cp0_perfcount_irq if it is set
@ 2012-04-30 11:32 John Crispin
  2012-04-30 11:32 ` [PATCH 02/14] MIPS: pci: parse memory ranges from devicetree John Crispin
                   ` (12 more replies)
  0 siblings, 13 replies; 24+ messages in thread
From: John Crispin @ 2012-04-30 11:32 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: linux-mips@linux-mips.org, John Crispin, Felix Fietkau

Make the oprofile code use the performance counters irq.

The patch was written by Felix.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/oprofile/op_model_mipsxx.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 54759f1..86cf234 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -298,6 +298,11 @@ static void reset_counters(void *arg)
 	}
 }
 
+static irqreturn_t mipsxx_perfcount_int(int irq, void *dev_id)
+{
+	return mipsxx_perfcount_handler();
+}
+
 static int __init mipsxx_init(void)
 {
 	int counters;
@@ -374,6 +379,10 @@ static int __init mipsxx_init(void)
 	save_perf_irq = perf_irq;
 	perf_irq = mipsxx_perfcount_handler;
 
+	if (cp0_perfcount_irq >= 0)
+		return request_irq(cp0_perfcount_irq, mipsxx_perfcount_int,
+			IRQF_SHARED, "Perfcounter", save_perf_irq);
+
 	return 0;
 }
 
@@ -381,6 +390,9 @@ static void mipsxx_exit(void)
 {
 	int counters = op_model_mipsxx_ops.num_counters;
 
+	if (cp0_perfcount_irq >= 0)
+		free_irq(cp0_perfcount_irq, save_perf_irq);
+
 	counters = counters_per_cpu_to_total(counters);
 	on_each_cpu(reset_counters, (void *)(long)counters, 1);
 
-- 
1.7.9.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread
* [PATCH 02/14] MIPS: pci: parse memory ranges from devicetree
@ 2012-05-03 17:42 John Crispin
  2012-05-03 19:30 ` Geert Uytterhoeven
  0 siblings, 1 reply; 24+ messages in thread
From: John Crispin @ 2012-05-03 17:42 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: linux-mips@linux-mips.org, John Crispin

Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit
bus width is supported. This function is based on the implementation found on
powerpc.

Signed-off-by: John Crispin <blogic@openwrt.org>

---
Changes in V2
* remove some #ifdefs
* rename to pci_load_of_ranges

Changes in V3
* set pointers to NULL and not 0

 arch/mips/include/asm/pci.h |    6 ++++
 arch/mips/pci/pci.c         |   55 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+), 0 deletions(-)

diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index fcd4060..90bf3b3 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -17,6 +17,7 @@
  */
 
 #include <linux/ioport.h>
+#include <linux/of.h>
 
 /*
  * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
@@ -26,6 +27,7 @@
 struct pci_controller {
 	struct pci_controller *next;
 	struct pci_bus *bus;
+	struct device_node *of_node;
 
 	struct pci_ops *pci_ops;
 	struct resource *mem_resource;
@@ -142,4 +144,8 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 
 extern char * (*pcibios_plat_setup)(char *str);
 
+/* this function parses memory ranges from a device node */
+extern void __devinit pci_load_of_ranges(struct pci_controller *hose,
+					 struct device_node *node);
+
 #endif /* _ASM_PCI_H */
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 0514866..a10c951 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -16,6 +16,7 @@
 #include <linux/init.h>
 #include <linux/types.h>
 #include <linux/pci.h>
+#include <linux/of_address.h>
 
 #include <asm/cpu-info.h>
 
@@ -114,9 +115,63 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
 			pci_bus_assign_resources(bus);
 			pci_enable_bridges(bus);
 		}
+		bus->dev.of_node = hose->of_node;
 	}
 }
 
+#ifdef CONFIG_OF
+void __devinit pci_load_of_ranges(struct pci_controller *hose,
+				struct device_node *node)
+{
+	const __be32 *ranges;
+	int rlen;
+	int pna = of_n_addr_cells(node);
+	int np = pna + 5;
+
+	pr_info("PCI host bridge %s ranges:\n", node->full_name);
+	ranges = of_get_property(node, "ranges", &rlen);
+	if (ranges == NULL)
+		return;
+	hose->of_node = node;
+
+	while ((rlen -= np * 4) >= 0) {
+		u32 pci_space;
+		struct resource *res = NULL;
+		unsigned long long addr, size;
+
+		pci_space = ranges[0];
+		addr = of_translate_address(node, ranges + 3);
+		size = of_read_number(ranges + pna + 3, 2);
+		ranges += np;
+		switch ((pci_space >> 24) & 0x3) {
+		case 1:		/* PCI IO space */
+			pr_info("  IO 0x%016llx..0x%016llx\n",
+					addr, addr + size - 1);
+			hose->io_map_base =
+				(unsigned long)ioremap(addr, size);
+			res = hose->io_resource;
+			res->flags = IORESOURCE_IO;
+			break;
+		case 2:		/* PCI Memory space */
+		case 3:		/* PCI 64 bits Memory space */
+			pr_info(" MEM 0x%016llx..0x%016llx\n",
+					addr, addr + size - 1);
+			res = hose->mem_resource;
+			res->flags = IORESOURCE_MEM;
+			break;
+		}
+		if (res != NULL) {
+			res->start = addr;
+			res->name = node->full_name;
+			res->end = res->start + size - 1;
+			res->parent = NULL;
+			res->sibling = NULL;
+			res->child = NULL;
+		}
+	}
+}
+#endif
+
 static DEFINE_MUTEX(pci_scan_mutex);
 
 void __devinit register_pci_controller(struct pci_controller *hose)
-- 
1.7.9.1

^ permalink raw reply related	[flat|nested] 24+ messages in thread
end of thread, other threads:[~2012-05-03 19:41 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-04-30 11:32 [PATCH 01/14] MIPS: make oprofile use cp0_perfcount_irq if it is set John Crispin
2012-04-30 11:32 ` [PATCH 02/14] MIPS: pci: parse memory ranges from devicetree John Crispin
2012-04-30 16:55   ` David Daney
2012-04-30 17:02     ` John Crispin
2012-05-01 11:17     ` John Crispin
2012-04-30 11:32 ` [PATCH 03/14] MIPS: Provide pci_address_to_pio John Crispin
2012-04-30 11:32 ` [PATCH 04/14] MIPS: Add helper function to allow platforms to point at a DTB John Crispin
2012-04-30 16:50   ` David Daney
2012-04-30 22:58   ` Sergei Shtylyov
2012-04-30 11:33 ` [PATCH 05/14] MIPS: parse chosen node on boot John Crispin
2012-04-30 11:33 ` [PATCH 06/14] MIPS: add clkdev.h John Crispin
2012-04-30 11:33 ` [PATCH 07/14] MIPS: remove unused prototype kgdb_config John Crispin
2012-04-30 11:33 ` [PATCH 08/14] MIPS: lantiq: clear all irqs properly on boot John Crispin
2012-04-30 23:01   ` Sergei Shtylyov
2012-05-01  6:37     ` John Crispin
2012-04-30 11:33 ` [PATCH 09/14] MIPS: lantiq: enable oprofile support on lantiq targets John Crispin
2012-04-30 11:33 ` [PATCH 10/14] MIPS: lantiq: add ipi handlers to make vsmp work John Crispin
2012-04-30 11:33 ` [PATCH 11/14] MIPS: lantiq: fix early printk John Crispin
2012-04-30 11:33 ` [PATCH 12/14] MIPS: lantiq: fix cmdline parsing John Crispin
2012-04-30 11:33 ` [PATCH 13/14] MIPS: lantiq: add xway soc ids John Crispin
2012-04-30 11:33 ` [PATCH 14/14] MIPS: lantiq: cleanup reset code John Crispin
  -- strict thread matches above, loose matches on Subject: below --
2012-05-03 17:42 [PATCH 02/14] MIPS: pci: parse memory ranges from devicetree John Crispin
2012-05-03 19:30 ` Geert Uytterhoeven
2012-05-03 19:39   ` John Crispin

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