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From: John Crispin <blogic@openwrt.org>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-mips@linux-mips.org, devicetree-discuss@lists.ozlabs.org,
	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 04/14] OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support
Date: Tue, 08 May 2012 16:12:10 +0200	[thread overview]
Message-ID: <4FA929BA.9020702@openwrt.org> (raw)
In-Reply-To: <CACRpkdYJDd84GbKM7r4Xy+d4iOtdD+rJ3kdq-zwVbf_Attj2Gw@mail.gmail.com>

Hi Linus,

Thanks. I will fold your comments with Stephen's into a V2 and resend it.

> Shouldn't this be:
>
> depends on SOC_TYPE_XWAY
> depends on PINCTRL_LANTIQ
>
> ?
>
> So LANTIQ selects it's pinctrl driver, the the xway SoC
> selects its driver and they both are dependent on their
> respective system.
>
The whole select/depends part is broken. I will clean this up properly

>> diff --git a/drivers/pinctrl/pinctrl-lantiq.h b/drivers/pinctrl/pinctrl-lantiq.h
>> +#define ARRAY_AND_SIZE(x)      (x), ARRAY_SIZE(x)
I was actually considering to drop this. Having a "," inside a macro is
a bit ugly.
It leads to the calling code invoking the function with N-1 parameters,
although the function takes N parameters. I find this a bit
confusing/inconsistent.


>> +/* macros to help us access the registers */
>> +#define gpio_getbit(m, r, p)   (!!(ltq_r32(m + r) & (1 << p)))
>> +#define gpio_setbit(m, r, p)   ltq_w32_mask(0, (1 << p), m + r)
>> +#define gpio_clearbit(m, r, p) ltq_w32_mask((1 << p), 0, m + r)
> So what makes this arch so fantastic that it needs its own read/write functions?
> (Just curious...)
Nothing. Its a legacy macro from a few years ago when I first added
lantiq support inside openwrt. I personally like the macro. I use it
wherever I access lantiq registers.
When accessing generic memory ranges, as in the nand driver, I use
writeb() and co.

Matter of taste really. I would prefer to keep it this way if there are
no guidelines against it.

>> +/* ---------  gpio_chip related code --------- */
>> +
>> +int gpio_to_irq(unsigned int gpio)
>> +{
>> +       return -EINVAL;
>> +}
>> +EXPORT_SYMBOL(gpio_to_irq);
>> +
>> +int irq_to_gpio(unsigned int gpio)
>> +{
>> +       return -EINVAL;
>> +}
>> +EXPORT_SYMBOL(irq_to_gpio);
> Can't you just leave them undefined?

I just checked how ARM does it. They use
   arch/arm/include/asm/gpio.h

Let me talk to Ralf about this and make a MIPS version of said header file.

Thanks,
John

WARNING: multiple messages have this Message-ID (diff)
From: John Crispin <blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>
Subject: Re: [PATCH 04/14] OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support
Date: Tue, 08 May 2012 16:12:10 +0200	[thread overview]
Message-ID: <4FA929BA.9020702@openwrt.org> (raw)
In-Reply-To: <CACRpkdYJDd84GbKM7r4Xy+d4iOtdD+rJ3kdq-zwVbf_Attj2Gw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

Hi Linus,

Thanks. I will fold your comments with Stephen's into a V2 and resend it.

> Shouldn't this be:
>
> depends on SOC_TYPE_XWAY
> depends on PINCTRL_LANTIQ
>
> ?
>
> So LANTIQ selects it's pinctrl driver, the the xway SoC
> selects its driver and they both are dependent on their
> respective system.
>
The whole select/depends part is broken. I will clean this up properly

>> diff --git a/drivers/pinctrl/pinctrl-lantiq.h b/drivers/pinctrl/pinctrl-lantiq.h
>> +#define ARRAY_AND_SIZE(x)      (x), ARRAY_SIZE(x)
I was actually considering to drop this. Having a "," inside a macro is
a bit ugly.
It leads to the calling code invoking the function with N-1 parameters,
although the function takes N parameters. I find this a bit
confusing/inconsistent.


>> +/* macros to help us access the registers */
>> +#define gpio_getbit(m, r, p)   (!!(ltq_r32(m + r) & (1 << p)))
>> +#define gpio_setbit(m, r, p)   ltq_w32_mask(0, (1 << p), m + r)
>> +#define gpio_clearbit(m, r, p) ltq_w32_mask((1 << p), 0, m + r)
> So what makes this arch so fantastic that it needs its own read/write functions?
> (Just curious...)
Nothing. Its a legacy macro from a few years ago when I first added
lantiq support inside openwrt. I personally like the macro. I use it
wherever I access lantiq registers.
When accessing generic memory ranges, as in the nand driver, I use
writeb() and co.

Matter of taste really. I would prefer to keep it this way if there are
no guidelines against it.

>> +/* ---------  gpio_chip related code --------- */
>> +
>> +int gpio_to_irq(unsigned int gpio)
>> +{
>> +       return -EINVAL;
>> +}
>> +EXPORT_SYMBOL(gpio_to_irq);
>> +
>> +int irq_to_gpio(unsigned int gpio)
>> +{
>> +       return -EINVAL;
>> +}
>> +EXPORT_SYMBOL(irq_to_gpio);
> Can't you just leave them undefined?

I just checked how ARM does it. They use
   arch/arm/include/asm/gpio.h

Let me talk to Ralf about this and make a MIPS version of said header file.

Thanks,
John

  reply	other threads:[~2012-05-08 14:13 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-04 12:18 [PATCH 01/14] MIPS: lantiq: drop mips_machine support John Crispin
2012-05-04 12:18 ` [PATCH 02/14] OF: MIPS: lantiq: implement OF support John Crispin
2012-05-04 12:18   ` John Crispin
2012-05-12  0:47   ` Grant Likely
2012-05-12  0:47     ` Grant Likely
2012-05-04 12:18 ` [PATCH 03/14] OF: MIPS: lantiq: implement irq_domain support John Crispin
2012-05-04 12:18   ` John Crispin
2012-05-08 17:53   ` Grant Likely
2012-05-08 17:53     ` Grant Likely
2012-05-08 18:05     ` John Crispin
2012-05-08 18:05       ` John Crispin
2012-05-04 12:18 ` [PATCH 04/14] OF: pinctrl: MIPS: lantiq: implement lantiq/xway pinctrl support John Crispin
2012-05-04 12:18   ` John Crispin
2012-05-04 20:57   ` Stephen Warren
     [not found]     ` <4FA442B6.1020501-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-05-04 21:29       ` John Crispin
2012-05-08 13:21   ` Linus Walleij
2012-05-08 13:21     ` Linus Walleij
2012-05-08 14:12     ` John Crispin [this message]
2012-05-08 14:12       ` John Crispin
2012-05-08 15:28     ` Stephen Warren
2012-05-08 15:28       ` Stephen Warren
2012-05-08 15:39       ` John Crispin
2012-05-08 15:39         ` John Crispin
2012-05-08 15:51         ` Stephen Warren
2012-05-08 15:51           ` Stephen Warren
2012-05-08 15:59           ` John Crispin
2012-05-08 15:59             ` John Crispin
2012-05-04 12:18 ` [PATCH 05/14] MIPS: lantiq: implement support for clkdev api John Crispin
2012-05-04 12:18 ` [PATCH 06/14] MIPS: lantiq: convert dma to platform driver John Crispin
2012-05-04 12:18 ` [PATCH 07/14] MIPS: pci: convert lantiq driver to OF John Crispin
2012-05-04 12:18 ` [PATCH 08/14] GPIO: MIPS: lantiq: convert gpio-stp to OF and move it to subsystem John Crispin
2012-05-04 12:18 ` [PATCH 09/14] GPIO: MIPS: lantiq: convert gpio-ebu " John Crispin
2012-05-04 12:18 ` [PATCH 10/14] SERIAL: MIPS: lantiq: implement OF support John Crispin
2012-05-04 12:18 ` [PATCH 11/14] watchdog: MIPS: lantiq: implement OF support and minor fixes John Crispin
2012-05-04 13:22   ` Wim Van Sebroeck
2012-05-04 12:18 ` [PATCH 12/14] MTD: MIPS: lantiq: implement OF support John Crispin
2012-05-04 12:18   ` John Crispin
2012-05-11 14:06   ` Artem Bityutskiy
2012-05-11 14:06     ` Artem Bityutskiy
2012-05-11 14:04     ` John Crispin
2012-05-11 14:04       ` John Crispin
2012-05-11 14:16       ` Artem Bityutskiy
2012-05-11 14:16         ` Artem Bityutskiy
2012-05-14 12:21   ` Artem Bityutskiy
2012-05-14 12:21     ` Artem Bityutskiy
2012-05-14 12:31     ` John Crispin
2012-05-04 12:18 ` [PATCH 13/14] NET: MIPS: lantiq: implement OF support inside the etop driver John Crispin
2012-05-04 12:18 ` [PATCH 14/14] MIPS: lantiq: remove orphaned code John Crispin

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