* [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared
@ 2012-07-07 5:05 Deep Debroy
2012-07-07 7:56 ` Blue Swirl
0 siblings, 1 reply; 4+ messages in thread
From: Deep Debroy @ 2012-07-07 5:05 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini
Signed-off-by: Deep Debroy <ddebroy@gmail.com>
---
hw/vmware_utils.h | 126 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 126 insertions(+)
create mode 100644 hw/vmware_utils.h
diff --git a/hw/vmware_utils.h b/hw/vmware_utils.h
new file mode 100644
index 0000000..73b039e
--- /dev/null
+++ b/hw/vmware_utils.h
@@ -0,0 +1,126 @@
+/*
+ * QEMU VMWARE paravirtual devices - auxiliary code
+ *
+ * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
+ *
+ * Developed by Daynix Computing LTD (http://www.daynix.com)
+ *
+ * Authors:
+ * Dmitry Fleytman <dmitry@daynix.com>
+ * Yan Vugenfirer <yvugenfi@redhat.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#ifndef VMWARE_UTILS_H
+#define VMWARE_UTILS_H
+
+#ifndef DSHPRINTF
+#define DSHPRINTF(fmt, ...) do {} while (0)
+#endif
+
+/* Shared memory access functions with byte swap support */
+static inline void
+vmw_shmem_read(target_phys_addr_t addr, void *buf, int len)
+{
+ DSHPRINTF("SHMEM r: %" PRIx64 ", len: %d to %p", addr, len, buf);
+ cpu_physical_memory_read(addr, buf, len);
+}
+
+static inline void
+vmw_shmem_write(target_phys_addr_t addr, void *buf, int len)
+{
+ DSHPRINTF("SHMEM w: %" PRIx64 ", len: %d to %p", addr, len, buf);
+ cpu_physical_memory_write(addr, buf, len);
+}
+
+static inline void
+vmw_shmem_rw(target_phys_addr_t addr, void *buf, int len, int is_write)
+{
+ DSHPRINTF("SHMEM r/w: %" PRIx64 ", len: %d (to %p), is write: %d",
+ addr, len, buf, is_write);
+
+ cpu_physical_memory_rw(addr, buf, len, is_write);
+}
+
+static inline void
+vmw_shmem_set(target_phys_addr_t addr, uint8 val, int len)
+{
+ int i;
+ DSHPRINTF("SHMEM set: %" PRIx64 ", len: %d (value 0x%X)", addr, len, val);
+
+ for (i = 0; i < len; i++) {
+ cpu_physical_memory_write(addr + i, &val, 1);
+ }
+}
+
+static inline uint32_t
+vmw_shmem_ld8(target_phys_addr_t addr)
+{
+ uint8_t res = ldub_phys(addr);
+ DSHPRINTF("SHMEM load8: %" PRIx64 " (value 0x%X)", addr, res);
+ return res;
+}
+
+static inline void
+vmw_shmem_st8(target_phys_addr_t addr, uint8_t value)
+{
+ DSHPRINTF("SHMEM store8: %" PRIx64 " (value 0x%X)", addr, value);
+ stb_phys(addr, value);
+}
+
+static inline uint32_t
+vmw_shmem_ld16(target_phys_addr_t addr)
+{
+ uint16_t res = lduw_le_phys(addr);
+ DSHPRINTF("SHMEM load16: %" PRIx64 " (value 0x%X)", addr, res);
+ return res;
+}
+
+static inline void
+vmw_shmem_st16(target_phys_addr_t addr, uint16_t value)
+{
+ DSHPRINTF("SHMEM store16: %" PRIx64 " (value 0x%X)", addr, value);
+ stw_le_phys(addr, value);
+}
+
+static inline uint32_t
+vmw_shmem_ld32(target_phys_addr_t addr)
+{
+ uint32_t res = ldl_le_phys(addr);
+ DSHPRINTF("SHMEM load32: %" PRIx64 " (value 0x%X)", addr, res);
+ return res;
+}
+
+static inline void
+vmw_shmem_st32(target_phys_addr_t addr, uint32_t value)
+{
+ DSHPRINTF("SHMEM store32: %" PRIx64 " (value 0x%X)", addr, value);
+ stl_le_phys(addr, value);
+}
+
+static inline uint64_t
+vmw_shmem_ld64(target_phys_addr_t addr)
+{
+ uint64_t res = ldq_le_phys(addr);
+ DSHPRINTF("SHMEM load64: %" PRIx64 " (value %" PRIx64 ")", addr, res);
+ return res;
+}
+
+static inline void
+vmw_shmem_st64(target_phys_addr_t addr, uint64_t value)
+{
+ DSHPRINTF("SHMEM store64: %" PRIx64 " (value %" PRIx64 ")", addr, value);
+ stq_le_phys(addr, value);
+}
+
+/* MACROS for simplification of operations on array-style registers */
+#define IS_MULTIREG_ADDR(addr, base, cnt, regsize) \
+ (((addr) >= (base)) && ((addr) < (base) + (cnt) * (regsize)))
+
+#define MULTIREG_IDX_BY_ADDR(addr, base, regsize) \
+ (((addr) - (base)) / (regsize))
+
+#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared
2012-07-07 5:05 [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared Deep Debroy
@ 2012-07-07 7:56 ` Blue Swirl
2012-07-09 6:57 ` Paolo Bonzini
0 siblings, 1 reply; 4+ messages in thread
From: Blue Swirl @ 2012-07-07 7:56 UTC (permalink / raw)
To: Deep Debroy; +Cc: Paolo Bonzini, qemu-devel
On Sat, Jul 7, 2012 at 5:05 AM, Deep Debroy <ddebroy@gmail.com> wrote:
> Signed-off-by: Deep Debroy <ddebroy@gmail.com>
> ---
> hw/vmware_utils.h | 126 +++++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 126 insertions(+)
> create mode 100644 hw/vmware_utils.h
>
> diff --git a/hw/vmware_utils.h b/hw/vmware_utils.h
> new file mode 100644
> index 0000000..73b039e
> --- /dev/null
> +++ b/hw/vmware_utils.h
> @@ -0,0 +1,126 @@
> +/*
> + * QEMU VMWARE paravirtual devices - auxiliary code
> + *
> + * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
> + *
> + * Developed by Daynix Computing LTD (http://www.daynix.com)
> + *
> + * Authors:
> + * Dmitry Fleytman <dmitry@daynix.com>
> + * Yan Vugenfirer <yvugenfi@redhat.com>
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + *
> + */
> +
> +#ifndef VMWARE_UTILS_H
> +#define VMWARE_UTILS_H
> +
> +#ifndef DSHPRINTF
> +#define DSHPRINTF(fmt, ...) do {} while (0)
> +#endif
> +
> +/* Shared memory access functions with byte swap support */
> +static inline void
> +vmw_shmem_read(target_phys_addr_t addr, void *buf, int len)
> +{
> + DSHPRINTF("SHMEM r: %" PRIx64 ", len: %d to %p", addr, len, buf);
PRIx64 is not correct, please use TARGET_FMT_plx. Tracepoints are also
superior to debug printfs.
> + cpu_physical_memory_read(addr, buf, len);
> +}
These don't seem useful. I think DMA accessors should also be used.
> +
> +static inline void
> +vmw_shmem_write(target_phys_addr_t addr, void *buf, int len)
> +{
> + DSHPRINTF("SHMEM w: %" PRIx64 ", len: %d to %p", addr, len, buf);
> + cpu_physical_memory_write(addr, buf, len);
> +}
> +
> +static inline void
> +vmw_shmem_rw(target_phys_addr_t addr, void *buf, int len, int is_write)
> +{
> + DSHPRINTF("SHMEM r/w: %" PRIx64 ", len: %d (to %p), is write: %d",
> + addr, len, buf, is_write);
> +
> + cpu_physical_memory_rw(addr, buf, len, is_write);
> +}
> +
> +static inline void
> +vmw_shmem_set(target_phys_addr_t addr, uint8 val, int len)
> +{
> + int i;
> + DSHPRINTF("SHMEM set: %" PRIx64 ", len: %d (value 0x%X)", addr, len, val);
> +
> + for (i = 0; i < len; i++) {
> + cpu_physical_memory_write(addr + i, &val, 1);
> + }
> +}
> +
> +static inline uint32_t
> +vmw_shmem_ld8(target_phys_addr_t addr)
> +{
> + uint8_t res = ldub_phys(addr);
> + DSHPRINTF("SHMEM load8: %" PRIx64 " (value 0x%X)", addr, res);
> + return res;
> +}
> +
> +static inline void
> +vmw_shmem_st8(target_phys_addr_t addr, uint8_t value)
> +{
> + DSHPRINTF("SHMEM store8: %" PRIx64 " (value 0x%X)", addr, value);
> + stb_phys(addr, value);
> +}
> +
> +static inline uint32_t
> +vmw_shmem_ld16(target_phys_addr_t addr)
> +{
> + uint16_t res = lduw_le_phys(addr);
> + DSHPRINTF("SHMEM load16: %" PRIx64 " (value 0x%X)", addr, res);
> + return res;
> +}
> +
> +static inline void
> +vmw_shmem_st16(target_phys_addr_t addr, uint16_t value)
> +{
> + DSHPRINTF("SHMEM store16: %" PRIx64 " (value 0x%X)", addr, value);
> + stw_le_phys(addr, value);
> +}
> +
> +static inline uint32_t
> +vmw_shmem_ld32(target_phys_addr_t addr)
> +{
> + uint32_t res = ldl_le_phys(addr);
> + DSHPRINTF("SHMEM load32: %" PRIx64 " (value 0x%X)", addr, res);
> + return res;
> +}
> +
> +static inline void
> +vmw_shmem_st32(target_phys_addr_t addr, uint32_t value)
> +{
> + DSHPRINTF("SHMEM store32: %" PRIx64 " (value 0x%X)", addr, value);
> + stl_le_phys(addr, value);
> +}
> +
> +static inline uint64_t
> +vmw_shmem_ld64(target_phys_addr_t addr)
> +{
> + uint64_t res = ldq_le_phys(addr);
> + DSHPRINTF("SHMEM load64: %" PRIx64 " (value %" PRIx64 ")", addr, res);
> + return res;
> +}
> +
> +static inline void
> +vmw_shmem_st64(target_phys_addr_t addr, uint64_t value)
> +{
> + DSHPRINTF("SHMEM store64: %" PRIx64 " (value %" PRIx64 ")", addr, value);
> + stq_le_phys(addr, value);
> +}
> +
> +/* MACROS for simplification of operations on array-style registers */
> +#define IS_MULTIREG_ADDR(addr, base, cnt, regsize) \
> + (((addr) >= (base)) && ((addr) < (base) + (cnt) * (regsize)))
> +
> +#define MULTIREG_IDX_BY_ADDR(addr, base, regsize) \
> + (((addr) - (base)) / (regsize))
> +
> +#endif
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared
2012-07-07 7:56 ` Blue Swirl
@ 2012-07-09 6:57 ` Paolo Bonzini
2012-07-09 7:41 ` Deep Debroy
0 siblings, 1 reply; 4+ messages in thread
From: Paolo Bonzini @ 2012-07-09 6:57 UTC (permalink / raw)
To: Blue Swirl; +Cc: Deep Debroy, qemu-devel
Il 07/07/2012 09:56, Blue Swirl ha scritto:
> These don't seem useful. I think DMA accessors should also be used.
This is a paravirtualized device model, so I think no (like virtio).
I agree that this patch can be dropped and the functions inlined
manually in pvscsi.c (patch 4).
Paolo
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared
2012-07-09 6:57 ` Paolo Bonzini
@ 2012-07-09 7:41 ` Deep Debroy
0 siblings, 0 replies; 4+ messages in thread
From: Deep Debroy @ 2012-07-09 7:41 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: Blue Swirl, qemu-devel
On Sun, Jul 8, 2012 at 11:57 PM, Paolo Bonzini <pbonzini@redhat.com> wrote:
> Il 07/07/2012 09:56, Blue Swirl ha scritto:
>> These don't seem useful. I think DMA accessors should also be used.
>
> This is a paravirtualized device model, so I think no (like virtio).
>
> I agree that this patch can be dropped and the functions inlined
> manually in pvscsi.c (patch 4).
Sounds good. Will inline these into pvscsi.c and re-submit in the next version.
>
> Paolo
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-07-09 7:41 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-07-07 5:05 [Qemu-devel] [PATCH 3/4 V3] Header with various utility functions shared Deep Debroy
2012-07-07 7:56 ` Blue Swirl
2012-07-09 6:57 ` Paolo Bonzini
2012-07-09 7:41 ` Deep Debroy
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.