Re: [PATCH v2 1/2] x86/cpu: Disable CR pinning during CPU bringup

[Dave Hansen <dave.hansen@intel.com>]

On 3/9/26 11:40, Tom Lendacky wrote:
> The SNP guest is dying in __x2apic_enable() when trying to read
> MSR_IA32_APICBASE, which will trigger a #VC.
> 
> If I set CR4[16] in cr4_init() then the SNP guest boots fine.

That sounds pretty definitive.

How does this work on the boot CPU? How does it manage to get FSGSBASE
set up before __x2apic_enable()? Or is it on the early exception code,
which might not use FSGSBASE instructions?

Either way, I do think this needs to get fixed up. It was not acceptable
for cr4_init() implicitly to set pinned features and then have the CPU
boot code come along and do:

	cr4_set_bits(X86_CR4_FSGSBASE);

It all basically worked by accident before.