From: Jan Kiszka <jan.kiszka@siemens.com>
To: Christoffer Dall <c.dall@virtualopensystems.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, Alexander Graf <agraf@suse.de>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
kvm-ppc <kvm-ppc@vger.kernel.org>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [kvmarm] [RFC PATCH 0/3] KVM: ARM: Get rid of hardcoded VGIC addresses
Date: Tue, 23 Oct 2012 10:48:28 +0000 [thread overview]
Message-ID: <508675FC.7090901@siemens.com> (raw)
In-Reply-To: <CANM98q+4diN7_xBtyo6AesDP=AVzj0xQ99vtgBNa=sxLifOzow@mail.gmail.com>
On 2012-10-18 15:48, Christoffer Dall wrote:
> On Wed, Oct 17, 2012 at 7:58 PM, Benjamin Herrenschmidt
> <benh@kernel.crashing.org> wrote:
>> On Thu, 2012-10-18 at 09:10 +1100, Paul Mackerras wrote:
>>>
>>> With the XICS, there are two types of irqchip: a source controller and
>>> a presentation controller. There is one presentation controller per
>>> vcpu and typically one source controller per PCI host bridge (a source
>>> controller can manage multiple sources). The "buid" above is
>>> basically an identifier for a source controller.
>>>
>>> So with the above, it would be quite easy to add new types and
>>> arguments for them.
>>
>> The only possible issue is that afiak, the ioctl number depends on the
>> structure size, no ? If it does, then we should add some padding to the
>> union to leave room for new types.
>>
> It sounds overall ok to me, however, Peter Maydell pointed out that
> QEMU is architected in such a way that creating the IRQ chip happens
> before QEMU knows how the chip fits with the model it is emulating and
> therefore lacks bits of information that we require for initializing
> the irq chip.
>
> Specifically on ARM the information needed is the base address of a
> hardware peripheral, which is virtualization aware, and is mapped
> directly into the guest's physical address space.
>
> One could argue that's not a concern for designing a good kernel api,
> but on the other hand, qemu is already quite a large system on its
> own, and we have to be practical.
>
> Another alternative is to just let qemu init the device, later give
> the base address and check before each execution of the vcpu whether
> the base address has been set and simply return an error if not. This
> latter approach just seems horrible and unintuitive to me.
>
> Thoughts?
The current irqchip API is like this:
KVM_CREATE_IRQCHIP (without any parameters)
...
KVM_CREATE_VCPU
KVM_SET_IRQCHIP (or the other way around)
...
KVM_RUN
The arguments you cannot pass via KVM_CREATE_IRQCHIP - which is more
like a "Hey, there will be an IRQ chip!" - could be passed via
KVM_SET_IRQCHIP (it has 512 bytes space). Provided there are sane
configuration defaults, at least after KVM_CREATE_VCPU, KVM_SET_IRQCHIP
becomes optional. Then you don't need the a check on KVM_RUN.
What do we need in addition to this in any of the non-x86 archs?
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded Linux
WARNING: multiple messages have this Message-ID (diff)
From: Jan Kiszka <jan.kiszka@siemens.com>
To: Christoffer Dall <c.dall@virtualopensystems.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, Alexander Graf <agraf@suse.de>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
kvm-ppc <kvm-ppc@vger.kernel.org>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [kvmarm] [RFC PATCH 0/3] KVM: ARM: Get rid of hardcoded VGIC addresses
Date: Tue, 23 Oct 2012 12:48:28 +0200 [thread overview]
Message-ID: <508675FC.7090901@siemens.com> (raw)
In-Reply-To: <CANM98q+4diN7_xBtyo6AesDP=AVzj0xQ99vtgBNa=sxLifOzow@mail.gmail.com>
On 2012-10-18 15:48, Christoffer Dall wrote:
> On Wed, Oct 17, 2012 at 7:58 PM, Benjamin Herrenschmidt
> <benh@kernel.crashing.org> wrote:
>> On Thu, 2012-10-18 at 09:10 +1100, Paul Mackerras wrote:
>>>
>>> With the XICS, there are two types of irqchip: a source controller and
>>> a presentation controller. There is one presentation controller per
>>> vcpu and typically one source controller per PCI host bridge (a source
>>> controller can manage multiple sources). The "buid" above is
>>> basically an identifier for a source controller.
>>>
>>> So with the above, it would be quite easy to add new types and
>>> arguments for them.
>>
>> The only possible issue is that afiak, the ioctl number depends on the
>> structure size, no ? If it does, then we should add some padding to the
>> union to leave room for new types.
>>
> It sounds overall ok to me, however, Peter Maydell pointed out that
> QEMU is architected in such a way that creating the IRQ chip happens
> before QEMU knows how the chip fits with the model it is emulating and
> therefore lacks bits of information that we require for initializing
> the irq chip.
>
> Specifically on ARM the information needed is the base address of a
> hardware peripheral, which is virtualization aware, and is mapped
> directly into the guest's physical address space.
>
> One could argue that's not a concern for designing a good kernel api,
> but on the other hand, qemu is already quite a large system on its
> own, and we have to be practical.
>
> Another alternative is to just let qemu init the device, later give
> the base address and check before each execution of the vcpu whether
> the base address has been set and simply return an error if not. This
> latter approach just seems horrible and unintuitive to me.
>
> Thoughts?
The current irqchip API is like this:
KVM_CREATE_IRQCHIP (without any parameters)
...
KVM_CREATE_VCPU
KVM_SET_IRQCHIP (or the other way around)
...
KVM_RUN
The arguments you cannot pass via KVM_CREATE_IRQCHIP - which is more
like a "Hey, there will be an IRQ chip!" - could be passed via
KVM_SET_IRQCHIP (it has 512 bytes space). Provided there are sane
configuration defaults, at least after KVM_CREATE_VCPU, KVM_SET_IRQCHIP
becomes optional. Then you don't need the a check on KVM_RUN.
What do we need in addition to this in any of the non-x86 archs?
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded Linux
next prev parent reply other threads:[~2012-10-23 10:48 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-14 0:04 [RFC PATCH 0/3] KVM: ARM: Get rid of hardcoded VGIC addresses Christoffer Dall
2012-10-14 0:04 ` [RFC PATCH 1/3] KVM: ARM: Introduce KVM_INIT_IRQCHIP ioctl Christoffer Dall
2012-10-17 20:21 ` Peter Maydell
2012-10-17 20:23 ` Christoffer Dall
2012-10-17 20:31 ` Peter Maydell
2012-10-17 20:39 ` Christoffer Dall
2012-10-18 12:20 ` Avi Kivity
2012-10-19 18:42 ` Christoffer Dall
2012-10-14 0:04 ` [RFC PATCH 2/3] KVM: ARM: Introduce KVM_SET_DEVICE_ADDRESS ioctl Christoffer Dall
2012-10-17 20:29 ` Peter Maydell
2012-10-19 18:46 ` Christoffer Dall
2012-10-19 20:24 ` Peter Maydell
2012-10-19 20:27 ` Christoffer Dall
2012-10-19 20:33 ` Christoffer Dall
2012-10-14 0:04 ` [RFC PATCH 3/3] KVM: ARM: Split KVM_CREATE_IRQCHIP and KVM_INIT_IRQCHIP Christoffer Dall
2012-10-18 11:15 ` Peter Maydell
2012-10-17 20:38 ` [kvmarm] [RFC PATCH 0/3] KVM: ARM: Get rid of hardcoded VGIC addresses Alexander Graf
2012-10-17 20:38 ` Alexander Graf
2012-10-17 20:39 ` Christoffer Dall
2012-10-17 20:39 ` Christoffer Dall
2012-10-17 21:19 ` Benjamin Herrenschmidt
2012-10-17 21:19 ` Benjamin Herrenschmidt
2012-10-17 22:10 ` Paul Mackerras
2012-10-17 22:10 ` Paul Mackerras
2012-10-17 23:58 ` Benjamin Herrenschmidt
2012-10-17 23:58 ` Benjamin Herrenschmidt
2012-10-18 13:48 ` Christoffer Dall
2012-10-18 13:48 ` Christoffer Dall
2012-10-18 13:49 ` Alexander Graf
2012-10-18 13:49 ` Alexander Graf
2012-10-18 15:25 ` Avi Kivity
2012-10-18 15:25 ` Avi Kivity
2012-10-23 10:48 ` Jan Kiszka [this message]
2012-10-23 10:48 ` Jan Kiszka
2012-10-23 10:52 ` Peter Maydell
2012-10-23 10:52 ` Peter Maydell
2012-10-23 11:00 ` Jan Kiszka
2012-10-23 11:00 ` Jan Kiszka
2012-10-23 11:04 ` Peter Maydell
2012-10-23 11:04 ` Peter Maydell
2012-10-23 11:08 ` Jan Kiszka
2012-10-23 11:08 ` Jan Kiszka
2012-10-24 0:50 ` Paul Mackerras
2012-10-24 0:50 ` Paul Mackerras
2012-10-25 11:57 ` Jan Kiszka
2012-10-25 11:57 ` Jan Kiszka
2012-10-25 16:14 ` Paolo Bonzini
2012-10-25 16:14 ` Paolo Bonzini
2012-10-25 16:32 ` Jan Kiszka
2012-10-25 16:32 ` Jan Kiszka
2012-10-25 18:27 ` Paolo Bonzini
2012-10-25 18:27 ` Paolo Bonzini
2012-10-25 19:40 ` Benjamin Herrenschmidt
2012-10-25 19:40 ` Benjamin Herrenschmidt
2012-10-26 9:58 ` Paolo Bonzini
2012-10-26 9:58 ` Paolo Bonzini
2012-10-26 10:09 ` Peter Maydell
2012-10-26 10:09 ` Peter Maydell
2012-10-26 10:15 ` Paolo Bonzini
2012-10-26 10:15 ` Paolo Bonzini
2012-10-26 10:22 ` Jan Kiszka
2012-10-26 10:22 ` Jan Kiszka
2012-10-26 10:44 ` Benjamin Herrenschmidt
2012-10-26 10:44 ` Benjamin Herrenschmidt
2012-10-26 11:00 ` Jan Kiszka
2012-10-26 11:00 ` Jan Kiszka
2012-10-26 11:09 ` Benjamin Herrenschmidt
2012-10-26 11:09 ` Benjamin Herrenschmidt
2012-10-26 11:57 ` Paolo Bonzini
2012-10-26 11:57 ` Paolo Bonzini
2012-10-26 12:08 ` Peter Maydell
2012-10-26 12:08 ` Peter Maydell
2012-10-26 12:41 ` Jan Kiszka
2012-10-26 12:41 ` Jan Kiszka
2012-10-26 20:21 ` Benjamin Herrenschmidt
2012-10-26 20:21 ` Benjamin Herrenschmidt
2012-10-26 11:17 ` Peter Maydell
2012-10-26 11:17 ` Peter Maydell
2012-10-26 11:39 ` Benjamin Herrenschmidt
2012-10-26 11:39 ` Benjamin Herrenschmidt
2012-10-26 12:39 ` Jan Kiszka
2012-10-26 12:39 ` Jan Kiszka
2012-10-26 20:45 ` Benjamin Herrenschmidt
2012-10-26 20:45 ` Benjamin Herrenschmidt
2012-10-26 22:03 ` Benjamin Herrenschmidt
2012-10-26 22:03 ` Benjamin Herrenschmidt
2012-10-27 8:06 ` Jan Kiszka
2012-10-27 8:06 ` Jan Kiszka
2012-10-27 10:01 ` Peter Maydell
2012-10-27 10:01 ` Peter Maydell
2012-10-28 22:19 ` Benjamin Herrenschmidt
2012-10-28 22:19 ` Benjamin Herrenschmidt
2012-10-26 10:37 ` Benjamin Herrenschmidt
2012-10-26 10:37 ` Benjamin Herrenschmidt
2012-10-26 10:40 ` Paolo Bonzini
2012-10-26 10:40 ` Paolo Bonzini
2012-10-26 10:47 ` Benjamin Herrenschmidt
2012-10-26 10:47 ` Benjamin Herrenschmidt
2012-10-26 11:47 ` Paolo Bonzini
2012-10-26 11:47 ` Paolo Bonzini
2012-10-25 19:39 ` Benjamin Herrenschmidt
2012-10-25 19:39 ` Benjamin Herrenschmidt
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