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From: Lars-Peter Clausen <lars@metafoo.de>
To: Josh Cartwright <josh.cartwright@ni.com>
Cc: Grant Likely <grant.likely@secretlab.ca>,
	Rob Herring <rob.herring@calxeda.com>,
	Russell King <linux@arm.linux.org.uk>,
	Mike Turquette <mturquette@ti.com>,
	John Stultz <johnstul@us.ibm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Alan Cox <alan@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	John Linn <John.Linn@xilinx.com>,
	Michal Simek <michal.simek@xilinx.com>,
	devicetree-discuss@lists.ozlabs.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-serial@vger.kernel.org, Michal Simek <monstr@monstr.eu>
Subject: Re: [PATCH 5/8] ARM: zynq: add COMMON_CLK support
Date: Fri, 02 Nov 2012 10:33:44 +0100	[thread overview]
Message-ID: <50939378.2050500@metafoo.de> (raw)
In-Reply-To: <94af5ee92c2d68f245eb902de74909aadf159be1.1351721190.git.josh.cartwright@ni.com>

On 10/31/2012 07:58 PM, Josh Cartwright wrote:
> [...]
> +#define PERIPH_CLK_CTRL_SRC(x)	(periph_clk_parent_map[((x)&3)>>4])
> +#define PERIPH_CLK_CTRL_DIV(x)	(((x)&0x3F00)>>8)

A few more spaces wouldn't hurt ;)

> [...]
> +static void __init zynq_periph_clk_setup(struct device_node *np)
> +{
> +	struct zynq_periph_clk *periph;
> +	const char *parent_names[3];
> +	struct clk_init_data init;
> +	struct clk *clk;
> +	int err;
> +	u32 reg;
> +	int i;
> +
> +	err = of_property_read_u32(np, "reg", &reg);
> +	WARN_ON(err);

Shouldn't the function abort if a error happens somewhere? Continuing here
will lead to undefined behavior. Same is probably true for the other WARN_ONs.

> +
> +	periph = kzalloc(sizeof(*periph), GFP_KERNEL);
> +	WARN_ON(!periph);
> +
> +	periph->clk_ctrl = slcr_base + reg;
> +	spin_lock_init(&periph->clkact_lock);
> +
> +	init.name = np->name;
> +	init.ops = &zynq_periph_clk_ops;
> +	for (i = 0; i < ARRAY_SIZE(parent_names); i++)
> +		parent_names[i] = of_clk_get_parent_name(np, i);
> +	init.parent_names = parent_names;
> +	init.num_parents = ARRAY_SIZE(parent_names);
> +
> +	periph->hw.init = &init;
> +
> +	clk = clk_register(NULL, &periph->hw);
> +	WARN_ON(IS_ERR(clk));
> +
> +	err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
> +	WARN_ON(err);
> +
> +	for (i = 0; i < 2; i++) {

Not all of the peripheral clock generators have two output clocks. I think
it makes sense to use the number entries in clock-output-names here.

> +		const char *name;
> +
> +		err = of_property_read_string_index(np, "clock-output-names", i,
> +						    &name);
> +		WARN_ON(err);
> +
> +		periph->gates[i] = clk_register_gate(NULL, name, np->name, 0,
> +						     periph->clk_ctrl, i, 0,
> +						     &periph->clkact_lock);
> +		WARN_ON(IS_ERR(periph->gates[i]));
> +	}
> +
> +	periph->onecell_data.clks = periph->gates;
> +	periph->onecell_data.clk_num = i;
> +
> +	err = of_clk_add_provider(np, of_clk_src_onecell_get,
> +				  &periph->onecell_data);
> +	WARN_ON(err);
> +}
> [...]


WARNING: multiple messages have this Message-ID (diff)
From: lars@metafoo.de (Lars-Peter Clausen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/8] ARM: zynq: add COMMON_CLK support
Date: Fri, 02 Nov 2012 10:33:44 +0100	[thread overview]
Message-ID: <50939378.2050500@metafoo.de> (raw)
In-Reply-To: <94af5ee92c2d68f245eb902de74909aadf159be1.1351721190.git.josh.cartwright@ni.com>

On 10/31/2012 07:58 PM, Josh Cartwright wrote:
> [...]
> +#define PERIPH_CLK_CTRL_SRC(x)	(periph_clk_parent_map[((x)&3)>>4])
> +#define PERIPH_CLK_CTRL_DIV(x)	(((x)&0x3F00)>>8)

A few more spaces wouldn't hurt ;)

> [...]
> +static void __init zynq_periph_clk_setup(struct device_node *np)
> +{
> +	struct zynq_periph_clk *periph;
> +	const char *parent_names[3];
> +	struct clk_init_data init;
> +	struct clk *clk;
> +	int err;
> +	u32 reg;
> +	int i;
> +
> +	err = of_property_read_u32(np, "reg", &reg);
> +	WARN_ON(err);

Shouldn't the function abort if a error happens somewhere? Continuing here
will lead to undefined behavior. Same is probably true for the other WARN_ONs.

> +
> +	periph = kzalloc(sizeof(*periph), GFP_KERNEL);
> +	WARN_ON(!periph);
> +
> +	periph->clk_ctrl = slcr_base + reg;
> +	spin_lock_init(&periph->clkact_lock);
> +
> +	init.name = np->name;
> +	init.ops = &zynq_periph_clk_ops;
> +	for (i = 0; i < ARRAY_SIZE(parent_names); i++)
> +		parent_names[i] = of_clk_get_parent_name(np, i);
> +	init.parent_names = parent_names;
> +	init.num_parents = ARRAY_SIZE(parent_names);
> +
> +	periph->hw.init = &init;
> +
> +	clk = clk_register(NULL, &periph->hw);
> +	WARN_ON(IS_ERR(clk));
> +
> +	err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
> +	WARN_ON(err);
> +
> +	for (i = 0; i < 2; i++) {

Not all of the peripheral clock generators have two output clocks. I think
it makes sense to use the number entries in clock-output-names here.

> +		const char *name;
> +
> +		err = of_property_read_string_index(np, "clock-output-names", i,
> +						    &name);
> +		WARN_ON(err);
> +
> +		periph->gates[i] = clk_register_gate(NULL, name, np->name, 0,
> +						     periph->clk_ctrl, i, 0,
> +						     &periph->clkact_lock);
> +		WARN_ON(IS_ERR(periph->gates[i]));
> +	}
> +
> +	periph->onecell_data.clks = periph->gates;
> +	periph->onecell_data.clk_num = i;
> +
> +	err = of_clk_add_provider(np, of_clk_src_onecell_get,
> +				  &periph->onecell_data);
> +	WARN_ON(err);
> +}
> [...]

  reply	other threads:[~2012-11-02  9:34 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-31 22:06 [PATCH 0/8] zynq COMMON_CLK support Josh Cartwright
2012-10-31 22:06 ` Josh Cartwright
2012-10-29 18:42 ` [PATCH 2/8] ARM: zynq: move ttc timer code to drivers/clocksource Josh Cartwright
2012-10-29 18:42   ` Josh Cartwright
2012-11-05 11:22   ` Michal Simek
2012-11-05 11:22     ` Michal Simek
2012-11-05 14:49     ` Rob Herring
2012-11-05 14:49       ` Rob Herring
     [not found]     ` <CAHTX3d++0fGSw7GQHcc-S1X1Qh-rfekpr-E8Jkg2_vFqdCFFTg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-11-05 21:47       ` Josh Cartwright
2012-11-05 21:47         ` Josh Cartwright
2012-11-05 21:47         ` Josh Cartwright
2012-11-12 11:53         ` Michal Simek
2012-11-12 11:53           ` Michal Simek
2012-10-30 12:25 ` [PATCH 6/8] serial: xilinx_uartps: kill CONFIG_OF conditional Josh Cartwright
2012-10-30 12:25   ` Josh Cartwright
2012-10-30 12:25   ` Josh Cartwright
2012-11-05 12:16   ` Michal Simek
2012-11-05 12:16     ` Michal Simek
2012-10-31 17:11 ` [PATCH 1/8] ARM: zynq: move arm-specific sys_timer out of ttc Josh Cartwright
2012-10-31 17:11   ` Josh Cartwright
2012-10-31 17:11   ` Josh Cartwright
2012-11-05 11:20   ` Michal Simek
2012-11-05 11:20     ` Michal Simek
2012-11-05 11:20     ` Michal Simek
2012-10-31 18:24 ` [PATCH 4/8] ARM: zynq: dts: split up device tree Josh Cartwright
2012-10-31 18:24   ` Josh Cartwright
2012-10-31 18:24   ` Josh Cartwright
2012-11-05 11:32   ` Michal Simek
2012-11-05 11:32     ` Michal Simek
2012-10-31 18:58 ` [PATCH 5/8] ARM: zynq: add COMMON_CLK support Josh Cartwright
2012-10-31 18:58   ` Josh Cartwright
2012-11-02  9:33   ` Lars-Peter Clausen [this message]
2012-11-02  9:33     ` Lars-Peter Clausen
2012-11-02 13:38     ` Josh Cartwright
2012-11-02 13:38       ` Josh Cartwright
2012-11-02 13:38       ` Josh Cartwright
2012-11-02 15:12       ` Lars-Peter Clausen
2012-11-02 15:12         ` Lars-Peter Clausen
2012-11-02 15:28         ` Josh Cartwright
2012-11-02 15:28           ` Josh Cartwright
2012-11-02 15:28           ` Josh Cartwright
2012-11-05 12:31           ` Michal Simek
2012-11-05 12:31             ` Michal Simek
2012-10-31 19:28 ` [PATCH 7/8] serial: xilinx_uartps: get clock rate info from dts Josh Cartwright
2012-10-31 19:28   ` Josh Cartwright
2012-11-02  9:20   ` Lars-Peter Clausen
2012-11-02  9:20     ` Lars-Peter Clausen
2012-11-02 13:39     ` Josh Cartwright
2012-11-02 13:39       ` Josh Cartwright
2012-11-02 13:39       ` Josh Cartwright
2012-10-31 19:45 ` [PATCH 3/8] ARM: zynq: dts: add description of the second uart Josh Cartwright
2012-10-31 19:45   ` Josh Cartwright
2012-10-31 19:45   ` Josh Cartwright
2012-11-05 11:35   ` Michal Simek
2012-11-05 11:35     ` Michal Simek
2012-10-31 19:56 ` [PATCH 8/8] clocksource: xilinx_ttc: add OF_CLK support Josh Cartwright
2012-10-31 19:56   ` Josh Cartwright
2012-11-02  2:56   ` Josh Cartwright
2012-11-02  2:56     ` Josh Cartwright
2012-11-05 13:02   ` Michal Simek
2012-11-05 13:02     ` Michal Simek

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