From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] cpuidle: kirkwood: Move out of mach directory, add DT.
Date: Fri, 28 Dec 2012 23:32:41 +0530 [thread overview]
Message-ID: <50DDDEC1.9050307@ti.com> (raw)
In-Reply-To: <20121228175618.GC7578@lunn.ch>
On Friday 28 December 2012 11:26 PM, Andrew Lunn wrote:
>> Is this single CPU or multi-cpu machine ?
>
> Its a uniprocessor.
>
That should work then.
>> Even though the cpu_do_idle()
>> has just couple of instructions, there can be lot more happening in
>> background especially with multi masters system. It might be safe if the
>> single CPU is the only master accessing DDR. In multi-master, multi-CPU
>> scenario though it can't work reliably.
>
> There are DMA engines which could be active, moving stuff into/out of
> memory.
>
Sure but you must be stopping DMA before entering idle where DDR can
enter into self-refresh otherwise DMA transfer will be aborted. DDR
controller also can take care of such a scenario by not entering into
self refresh when DMA is active and self refresh command is issued.
> Having said that, this code is not new, it is just getting a new home.
> There has not been problems before. Having this 256 cycle delay etc,
> suggests the hardware design is robust.
>
Thanks for information that it is robust and working well. I was just
curious having faced some issues on this topic in past.
Regards
Santosh
WARNING: multiple messages have this Message-ID (diff)
From: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
To: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>
Cc: len.brown-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
rafael.j.wysocki-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
linux ARM
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH] cpuidle: kirkwood: Move out of mach directory, add DT.
Date: Fri, 28 Dec 2012 23:32:41 +0530 [thread overview]
Message-ID: <50DDDEC1.9050307@ti.com> (raw)
In-Reply-To: <20121228175618.GC7578-g2DYL2Zd6BY@public.gmane.org>
On Friday 28 December 2012 11:26 PM, Andrew Lunn wrote:
>> Is this single CPU or multi-cpu machine ?
>
> Its a uniprocessor.
>
That should work then.
>> Even though the cpu_do_idle()
>> has just couple of instructions, there can be lot more happening in
>> background especially with multi masters system. It might be safe if the
>> single CPU is the only master accessing DDR. In multi-master, multi-CPU
>> scenario though it can't work reliably.
>
> There are DMA engines which could be active, moving stuff into/out of
> memory.
>
Sure but you must be stopping DMA before entering idle where DDR can
enter into self-refresh otherwise DMA transfer will be aborted. DDR
controller also can take care of such a scenario by not entering into
self refresh when DMA is active and self refresh command is issued.
> Having said that, this code is not new, it is just getting a new home.
> There has not been problems before. Having this 256 cycle delay etc,
> suggests the hardware design is robust.
>
Thanks for information that it is robust and working well. I was just
curious having faced some issues on this topic in past.
Regards
Santosh
next prev parent reply other threads:[~2012-12-28 18:02 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-28 12:47 [PATCH] cpuidle: kirkwood: Move out of mach directory, add DT Andrew Lunn
2012-12-28 12:47 ` Andrew Lunn
2012-12-28 14:18 ` Rob Herring
2012-12-28 14:18 ` Rob Herring
2012-12-28 14:35 ` Andrew Lunn
2012-12-28 14:35 ` Andrew Lunn
2012-12-28 14:55 ` Rob Herring
2012-12-28 14:55 ` Rob Herring
2012-12-28 15:49 ` Andrew Lunn
2012-12-28 15:49 ` Andrew Lunn
2012-12-28 16:14 ` Rob Herring
2012-12-28 16:14 ` Rob Herring
2012-12-28 16:38 ` Andrew Lunn
2012-12-28 16:38 ` Andrew Lunn
2012-12-28 16:59 ` Rob Herring
2012-12-28 16:59 ` Rob Herring
2012-12-28 16:56 ` Santosh Shilimkar
2012-12-28 16:56 ` Santosh Shilimkar
2012-12-28 17:28 ` Andrew Lunn
2012-12-28 17:28 ` Andrew Lunn
2012-12-28 17:50 ` Santosh Shilimkar
2012-12-28 17:50 ` Santosh Shilimkar
2012-12-28 17:56 ` Andrew Lunn
2012-12-28 17:56 ` Andrew Lunn
2012-12-28 18:02 ` Santosh Shilimkar [this message]
2012-12-28 18:02 ` Santosh Shilimkar
2012-12-28 14:32 ` Florian Fainelli
2012-12-28 14:32 ` Florian Fainelli
2012-12-28 14:37 ` Andrew Lunn
2012-12-28 14:37 ` Andrew Lunn
2013-02-08 21:34 ` Grant Likely
2013-02-08 21:34 ` Grant Likely
2013-02-10 18:58 ` Andrew Lunn
2013-02-10 18:58 ` Andrew Lunn
2013-02-11 11:41 ` Grant Likely
2013-02-11 11:41 ` Grant Likely
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