Re: [Qemu-devel] [PATCH 3/4] hw: Add test device for unittests execution

["Andreas Färber" <afaerber@suse.de>]

Am 04.01.2013 09:16, schrieb Gerd Hoffmann:
> From: Lucas Meneghel Rodrigues <lmr@redhat.com>
> 
> Add a test device which supports the kvmctl ioports,
> so one can run the KVM unittest suite.
> 
> Intended Usage:
> 
> qemu-system-x86_64 -nographic \
>     -device pc-testdev \
>     -device isa-debug-exit,iobase=0xf4,iosize=0x04 \
>     -kernel /path/to/kvm/unittests/msr.flat
> 
> Where msr.flat is one of the KVM unittests, present on a
> separate repo,
> 
> git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
> 
> [ kraxel: more memory api + qom fixes ]
> 
> CC: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
> Signed-off-by: Lucas Meneghel Rodrigues <lmr@redhat.com>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
[...]
> diff --git a/hw/pc-testdev.c b/hw/pc-testdev.c
> new file mode 100644
> index 0000000..620c86c
> --- /dev/null
> +++ b/hw/pc-testdev.c
[...]
> +typedef struct PCTestdev {
> +    ISADevice parent_obj;
> +
> +    MemoryRegion ioport;
> +    MemoryRegion flush;
> +    MemoryRegion irq;
> +    MemoryRegion iomem;
> +    uint32_t ioport_data;
> +    char iomem_buf[IOMEM_LEN];
> +} PCTestdev;
> +
> +#define TYPE_TESTDEV "pc-testdev"
> +#define TESTDEV(obj) \
> +     OBJECT_CHECK(struct PCTestdev, (obj), TYPE_TESTDEV)

You define a typedef above but ignore it here and everywhere below. I'm
surprised that Anthony didn't complain - struct is an implementation
detail of today's QOM classes in lack of C++/etc. language support, and
even qdev used the typedefs.

Lucas/Gerd, can one of you please clean this up in a follow-up?

I only noticed this because I had to touch some of these lines rebasing
my ISA QOM realize queue - maybe some Perl wizard can add a
checkpatch.pl rule to catch this?

Thanks,
Andreas

> +
> +static void test_irq_line(void *opaque, hwaddr addr, uint64_t data,
> +                          unsigned len)
> +{
> +    struct PCTestdev *dev = opaque;
> +    struct ISADevice *isa = ISA_DEVICE(dev);
> +
> +    qemu_set_irq(isa_get_irq(isa, addr), !!data);
> +}
> +
> +static const MemoryRegionOps test_irq_ops = {
> +    .write = test_irq_line,
> +    .valid.min_access_size = 1,
> +    .valid.max_access_size = 1,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
> +};
> +
> +static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
> +                              unsigned len)
> +{
> +    struct PCTestdev *dev = opaque;
> +    dev->ioport_data = data;
> +}
> +
> +static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
> +{
> +    struct PCTestdev *dev = opaque;
> +    return dev->ioport_data;
> +}
> +
> +static const MemoryRegionOps test_ioport_ops = {
> +    .read = test_ioport_read,
> +    .write = test_ioport_write,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
> +};
> +
> +static void test_flush_page(void *opaque, hwaddr addr, uint64_t data,
> +                            unsigned len)
> +{
> +    hwaddr page = 4096;
> +    void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
> +
> +    /* We might not be able to get the full page, only mprotect what we actually
> +       have mapped */
> +    mprotect(a, page, PROT_NONE);
> +    mprotect(a, page, PROT_READ|PROT_WRITE);
> +    cpu_physical_memory_unmap(a, page, 0, 0);
> +}
> +
> +static const MemoryRegionOps test_flush_ops = {
> +    .write = test_flush_page,
> +    .valid.min_access_size = 4,
> +    .valid.max_access_size = 4,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
> +};
> +
> +static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
> +{
> +    struct PCTestdev *dev = opaque;
> +    uint64_t ret = 0;
> +    memcpy(&ret, &dev->iomem_buf[addr], len);
> +    ret = le64_to_cpu(ret);
> +
> +    return ret;
> +}
> +
> +static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
> +                             unsigned len)
> +{
> +    struct PCTestdev *dev = opaque;
> +    val = cpu_to_le64(val);
> +    memcpy(&dev->iomem_buf[addr], &val, len);
> +    dev->iomem_buf[addr] = val;
> +}
> +
> +static const MemoryRegionOps test_iomem_ops = {
> +    .read = test_iomem_read,
> +    .write = test_iomem_write,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
> +};
> +
> +static int init_test_device(ISADevice *isa)
> +{
> +    struct PCTestdev *dev = TESTDEV(isa);
> +    MemoryRegion *mem = isa_address_space(isa);
> +    MemoryRegion *io = isa_address_space_io(isa);
> +
> +    memory_region_init_io(&dev->ioport, &test_ioport_ops, dev,
> +                          "pc-testdev-ioport", 4);
> +    memory_region_init_io(&dev->flush, &test_flush_ops, dev,
> +                          "pc-testdev-flush-page", 4);
> +    memory_region_init_io(&dev->irq, &test_irq_ops, dev,
> +                          "pc-testdev-irq-line", 24);
> +    memory_region_init_io(&dev->iomem, &test_iomem_ops, dev,
> +                          "pc-testdev-iomem", IOMEM_LEN);
> +
> +    memory_region_add_subregion(io,  0xe0,       &dev->ioport);
> +    memory_region_add_subregion(io,  0xe4,       &dev->flush);
> +    memory_region_add_subregion(io,  0x2000,     &dev->irq);
> +    memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
> +
> +    return 0;
> +}
> +
> +static void testdev_class_init(ObjectClass *klass, void *data)
> +{
> +    ISADeviceClass *k = ISA_DEVICE_CLASS(klass);
> +
> +    k->init = init_test_device;
> +}
> +
> +static TypeInfo testdev_info = {

static const

> +    .name           = TYPE_TESTDEV,
> +    .parent         = TYPE_ISA_DEVICE,
> +    .instance_size  = sizeof(struct PCTestdev),
> +    .class_init     = testdev_class_init,
> +};
> +
> +static void testdev_register_types(void)
> +{
> +    type_register_static(&testdev_info);
> +}
> +
> +type_init(testdev_register_types)


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