[PATCH 0/5] x86, head_32: Some cleanups, -v2

[PATCH 0/5] x86, head_32: Some cleanups, -v2

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>


Ok,

here's the next version with new_cpu_data left put and two minor fixlets
added at the end. The patchset was boot-tested on a bunch of baremetal
boxes and all QEMU cpu models - no issues.

Boot tests:

* baremetal:
- P4
- Atom n270
- 32-bit kernel on an AMD64 (F10h Phenom and Intel SNB)

* qemu, with cpu models:
 - qemu64
 - phenom
 - core2duo
 - kvm64
 - qemu32
 - kvm32
 - coreduo
 - 486{,SX}
 - pentium{,2,3}
 - athlon
 - n270,+movbe
 - Conroe
 - Penryn
 - Nehalem
 - Westmere
 - SandyBridge
 - Haswell
 - Opteron_G{1,2,3,4,5}

Why am I testing all those, you ask? Because I'm a sadistic mofo :-)

Changelog:

v1:

here are some initial low-hanging fruits wrt head_32.S cleanup. I've
made them as easily digestible as possible; after all, this is boot asm
and meddling with it tends to upset kernels.

Also, I've made the assumption that having boot_cpu_data.cpuid_level
contain the CPUID level for the boot cpu means that the APs have the
same CPUID level. This should be the case on X86.

They boot fine 486 and 486SX in qemu but I'd like to hear whether
the direction I'm going is ok before I continue testing them on real
hardware.


Borislav Petkov (5):
  x86, head_32: Remove i386 pieces
  x86: Detect CPUID support early at boot
  x86, head_32: Remove second CPUID detection from default_entry
  x86, head_32: Give the 6 label a real name
  x86, head_32: Remove an old gcc2 fix

 arch/x86/kernel/head_32.S | 92 ++++++++++++++++++-----------------------------
 1 file changed, 35 insertions(+), 57 deletions(-)

-- 
1.8.1.3.535.ga923c31

[PATCH 1/5] x86, head_32: Remove i386 pieces

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

Remove code fragments detecting a 386 CPU since we don't support those
anymore. Also, do not do alignment checks because they're done only at
CPL3. Also, no need to preserve EFLAGS.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 22 +++++-----------------
 1 file changed, 5 insertions(+), 17 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 0b8c825fc264..f4d919e2cd2b 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -405,30 +405,21 @@ default_entry:
 	jz 1f				# Did we do this already?
 	call *%eax
 1:
-	
-/* check if it is 486 or 386. */
+
 /*
- * XXX - this does a lot of unnecessary setup.  Alignment checks don't
- * apply at our cpl of 0 and the stack ought to be aligned already, and
- * we don't need to preserve eflags.
+ * Check if it is 486
  */
 	movl $-1,X86_CPUID	# -1 for no CPUID initially
-	movb $3,X86		# at least 386
+	movb $4,X86		# at least 486
 	pushfl			# push EFLAGS
 	popl %eax		# get EFLAGS
 	movl %eax,%ecx		# save original EFLAGS
-	xorl $0x240000,%eax	# flip AC and ID bits in EFLAGS
+	xorl $0x200000,%eax	# flip ID bit in EFLAGS
 	pushl %eax		# copy to EFLAGS
 	popfl			# set EFLAGS
 	pushfl			# get new EFLAGS
 	popl %eax		# put it in eax
 	xorl %ecx,%eax		# change in flags
-	pushl %ecx		# restore original EFLAGS
-	popfl
-	testl $0x40000,%eax	# check if AC bit changed
-	je is386
-
-	movb $4,X86		# at least 486
 	testl $0x200000,%eax	# check if ID bit changed
 	je is486
 
@@ -456,10 +447,7 @@ default_entry:
 	movl %edx,X86_CAPABILITY
 
 is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
-	jmp 2f
-
-is386:	movl $2,%ecx		# set MP
-2:	movl %cr0,%eax
+	movl %cr0,%eax
 	andl $0x80000011,%eax	# Save PG,PE,ET
 	orl %ecx,%eax
 	movl %eax,%cr0
-- 
1.8.1.3.535.ga923c31

[PATCH 2/5] x86: Detect CPUID support early at boot

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

We detect CPUID function support on each CPU and save it for later use,
obviating the need to play the toggle EFLAGS.ID game every time. C code
is looking at ->cpuid_level anyway.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 48 +++++++++++++++++++++++------------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index f4d919e2cd2b..df0b324d2854 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -318,30 +318,38 @@ default_entry:
 	movl %eax,%cr0
 
 /*
- *	New page tables may be in 4Mbyte page mode and may
- *	be using the global pages. 
+ * Initialize EFLAGS. Some BIOSes leave bits like NT set. This would confuse the
+ * debugger if this code is traced. Best to initialize before switching to
+ * protected mode.
+ */
+
+	pushl $0
+	popfl
+
+/*
+ * New page tables may be in 4Mbyte page mode and may be using the global pages.
  *
- *	NOTE! If we are on a 486 we may have no cr4 at all!
- *	Specifically, cr4 exists if and only if CPUID exists
- *	and has flags other than the FPU flag set.
+ * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
+ * if and only if CPUID exists and has flags other than the FPU flag set.
  */
+	movl $-1,pa(X86_CPUID)		# preset CPUID level
 	movl $X86_EFLAGS_ID,%ecx
 	pushl %ecx
-	popfl
-	pushfl
-	popl %eax
-	pushl $0
-	popfl
+	popfl				# set EFLAGS=ID
 	pushfl
-	popl %edx
-	xorl %edx,%eax
-	testl %ecx,%eax
-	jz 6f			# No ID flag = no CPUID = no CR4
+	popl %eax			# get EFLAGS
+	testl $X86_EFLAGS_ID,%eax	# did EFLAGS.ID remained set?
+	jz 6f				# hw disallowed setting of ID bit
+					# which means no CPUID and no CR4
+
+	xorl %eax,%eax
+	cpuid
+	movl %eax,pa(X86_CPUID)		# save largest std CPUID function
 
 	movl $1,%eax
 	cpuid
-	andl $~1,%edx		# Ignore CPUID.FPU
-	jz 6f			# No flags or only CPUID.FPU = no CR4
+	andl $~1,%edx			# Ignore CPUID.FPU
+	jz 6f				# No flags or only CPUID.FPU = no CR4
 
 	movl pa(mmu_cr4_features),%eax
 	movl %eax,%cr4
@@ -389,14 +397,6 @@ default_entry:
 	addl $__PAGE_OFFSET, %esp
 
 /*
- * Initialize eflags.  Some BIOS's leave bits like NT set.  This would
- * confuse the debugger if this code is traced.
- * XXX - best to initialize before switching to protected mode.
- */
-	pushl $0
-	popfl
-
-/*
  * start system 32-bit setup. We need to re-do some of the things done
  * in 16-bit mode for the "real" operations.
  */
-- 
1.8.1.3.535.ga923c31

[PATCH 3/5] x86, head_32: Remove second CPUID detection from default_entry

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

We do that once earlier now and cache it into new_cpu_data.cpuid_level
so no need for the EFLAGS.ID toggling dance anymore.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index df0b324d2854..46aa51467c0e 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -409,18 +409,7 @@ default_entry:
 /*
  * Check if it is 486
  */
-	movl $-1,X86_CPUID	# -1 for no CPUID initially
-	movb $4,X86		# at least 486
-	pushfl			# push EFLAGS
-	popl %eax		# get EFLAGS
-	movl %eax,%ecx		# save original EFLAGS
-	xorl $0x200000,%eax	# flip ID bit in EFLAGS
-	pushl %eax		# copy to EFLAGS
-	popfl			# set EFLAGS
-	pushfl			# get new EFLAGS
-	popl %eax		# put it in eax
-	xorl %ecx,%eax		# change in flags
-	testl $0x200000,%eax	# check if ID bit changed
+	cmpl $-1,X86_CPUID
 	je is486
 
 	/* get vendor info */
@@ -446,7 +435,9 @@ default_entry:
 	movb %cl,X86_MASK
 	movl %edx,X86_CAPABILITY
 
-is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
+is486:
+	movb $4,X86
+	movl $0x50022,%ecx	# set AM, WP, NE and MP
 	movl %cr0,%eax
 	andl $0x80000011,%eax	# Save PG,PE,ET
 	orl %ecx,%eax
-- 
1.8.1.3.535.ga923c31

[PATCH 4/5] x86, head_32: Give the 6 label a real name

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

Jumping here we are about to enable paging so rename the label
accordingly.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 46aa51467c0e..75e96d7e4e5f 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -339,7 +339,7 @@ default_entry:
 	pushfl
 	popl %eax			# get EFLAGS
 	testl $X86_EFLAGS_ID,%eax	# did EFLAGS.ID remained set?
-	jz 6f				# hw disallowed setting of ID bit
+	jz enable_paging		# hw disallowed setting of ID bit
 					# which means no CPUID and no CR4
 
 	xorl %eax,%eax
@@ -349,13 +349,13 @@ default_entry:
 	movl $1,%eax
 	cpuid
 	andl $~1,%edx			# Ignore CPUID.FPU
-	jz 6f				# No flags or only CPUID.FPU = no CR4
+	jz enable_paging		# No flags or only CPUID.FPU = no CR4
 
 	movl pa(mmu_cr4_features),%eax
 	movl %eax,%cr4
 
 	testb $X86_CR4_PAE, %al		# check if PAE is enabled
-	jz 6f
+	jz enable_paging
 
 	/* Check if extended functions are implemented */
 	movl $0x80000000, %eax
@@ -363,7 +363,7 @@ default_entry:
 	/* Value must be in the range 0x80000001 to 0x8000ffff */
 	subl $0x80000001, %eax
 	cmpl $(0x8000ffff-0x80000001), %eax
-	ja 6f
+	ja enable_paging
 
 	/* Clear bogus XD_DISABLE bits */
 	call verify_cpu
@@ -372,7 +372,7 @@ default_entry:
 	cpuid
 	/* Execute Disable bit supported? */
 	btl $(X86_FEATURE_NX & 31), %edx
-	jnc 6f
+	jnc enable_paging
 
 	/* Setup EFER (Extended Feature Enable Register) */
 	movl $MSR_EFER, %ecx
@@ -382,7 +382,7 @@ default_entry:
 	/* Make changes effective */
 	wrmsr
 
-6:
+enable_paging:
 
 /*
  * Enable paging
-- 
1.8.1.3.535.ga923c31

[PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

gcc2 wants direction flag cleared but we don't support gcc2 anymore. So
drop it. Original patch adding this was:

commit 57d40092c375d2b6d34f814f5fb306967e22c4f5
Author: linus1 <torvalds@linuxfoundation.org>
Date:   Mon Nov 9 12:00:00 1992 -0600

    [PATCH] Linux-0.98.4 (November 9, 1992)
...

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 75e96d7e4e5f..fc56613224c3 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -463,7 +463,6 @@ is486:
 	xorl %eax,%eax			# Clear LDT
 	lldt %ax
 
-	cld			# gcc2 wants the direction flag cleared at all times
 	pushl $0		# fake return address for unwinder
 	jmp *(initial_code)
 
-- 
1.8.1.3.535.ga923c31

Re: [PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[H. Peter Anvin]

ALL versions of gcc want DF=0 at all times...

Borislav Petkov <bp@alien8.de> wrote:

>From: Borislav Petkov <bp@suse.de>
>
>gcc2 wants direction flag cleared but we don't support gcc2 anymore. So
>drop it. Original patch adding this was:
>
>commit 57d40092c375d2b6d34f814f5fb306967e22c4f5
>Author: linus1 <torvalds@linuxfoundation.org>
>Date:   Mon Nov 9 12:00:00 1992 -0600
>
>    [PATCH] Linux-0.98.4 (November 9, 1992)
>...
>
>Signed-off-by: Borislav Petkov <bp@suse.de>
>---
> arch/x86/kernel/head_32.S | 1 -
> 1 file changed, 1 deletion(-)
>
>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
>index 75e96d7e4e5f..fc56613224c3 100644
>--- a/arch/x86/kernel/head_32.S
>+++ b/arch/x86/kernel/head_32.S
>@@ -463,7 +463,6 @@ is486:
> 	xorl %eax,%eax			# Clear LDT
> 	lldt %ax
> 
>-	cld			# gcc2 wants the direction flag cleared at all times
> 	pushl $0		# fake return address for unwinder
> 	jmp *(initial_code)
> 

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.

Re: [PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[H. Peter Anvin]

However... DF should have been cleared long before this...

Borislav Petkov <bp@alien8.de> wrote:

>From: Borislav Petkov <bp@suse.de>
>
>gcc2 wants direction flag cleared but we don't support gcc2 anymore. So
>drop it. Original patch adding this was:
>
>commit 57d40092c375d2b6d34f814f5fb306967e22c4f5
>Author: linus1 <torvalds@linuxfoundation.org>
>Date:   Mon Nov 9 12:00:00 1992 -0600
>
>    [PATCH] Linux-0.98.4 (November 9, 1992)
>...
>
>Signed-off-by: Borislav Petkov <bp@suse.de>
>---
> arch/x86/kernel/head_32.S | 1 -
> 1 file changed, 1 deletion(-)
>
>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
>index 75e96d7e4e5f..fc56613224c3 100644
>--- a/arch/x86/kernel/head_32.S
>+++ b/arch/x86/kernel/head_32.S
>@@ -463,7 +463,6 @@ is486:
> 	xorl %eax,%eax			# Clear LDT
> 	lldt %ax
> 
>-	cld			# gcc2 wants the direction flag cleared at all times
> 	pushl $0		# fake return address for unwinder
> 	jmp *(initial_code)
> 

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.

Re: [PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[Borislav Petkov]

On Sat, Feb 09, 2013 at 12:52:01PM -0800, H. Peter Anvin wrote:
> However... DF should have been cleared long before this...

How about we do this at the beginning of default_entry where we clear
EFLAGS too:

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index fc56613224c3..8b2a8a824fc6 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -322,10 +322,11 @@ default_entry:
  * debugger if this code is traced. Best to initialize before switching to
  * protected mode.
  */
-
 	pushl $0
 	popfl
 
+	cld				# GCC wants DF=0 at all times
+
 /*
  * New page tables may be in 4Mbyte page mode and may be using the global pages.
  *
--

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

[PATCH 5/5 -v2] x86, head_32: Clear DF much earlier

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

All GCC versions expect the direction flag to be cleared (DF=0) so move
this to the default entry point for each core.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 75e96d7e4e5f..8b2a8a824fc6 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -322,10 +322,11 @@ default_entry:
  * debugger if this code is traced. Best to initialize before switching to
  * protected mode.
  */
-
 	pushl $0
 	popfl
 
+	cld				# GCC wants DF=0 at all times
+
 /*
  * New page tables may be in 4Mbyte page mode and may be using the global pages.
  *
@@ -463,7 +464,6 @@ is486:
 	xorl %eax,%eax			# Clear LDT
 	lldt %ax
 
-	cld			# gcc2 wants the direction flag cleared at all times
 	pushl $0		# fake return address for unwinder
 	jmp *(initial_code)
 
-- 
1.8.1.3.535.ga923c31

Re: [PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[H. Peter Anvin]

On 02/09/2013 01:23 PM, Borislav Petkov wrote:
> On Sat, Feb 09, 2013 at 12:52:01PM -0800, H. Peter Anvin wrote:
>> However... DF should have been cleared long before this...
>
> How about we do this at the beginning of default_entry where we clear
> EFLAGS too:
>
> diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
> index fc56613224c3..8b2a8a824fc6 100644
> --- a/arch/x86/kernel/head_32.S
> +++ b/arch/x86/kernel/head_32.S
> @@ -322,10 +322,11 @@ default_entry:
>    * debugger if this code is traced. Best to initialize before switching to
>    * protected mode.
>    */
> -
>   	pushl $0
>   	popfl
>
> +	cld				# GCC wants DF=0 at all times
> +

The pushfl/popfl sequence clears DF too...

	-hpa


-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

Re: [PATCH 5/5] x86, head_32: Remove an old gcc2 fix

[Borislav Petkov]

On Sat, Feb 09, 2013 at 02:23:36PM -0800, H. Peter Anvin wrote:
> The pushfl/popfl sequence clears DF too...

Yes, indeed, good realization!

Ok, I'll fold that fact as a comment into the 2/5 patch resend it only
as a reply to this mail so as not to spam unnecessarily.

Thanks.

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

[PATCH 2/5 -v2.1] x86: Detect CPUID support early at boot

[Borislav Petkov]

From: Borislav Petkov <bp@suse.de>

We detect CPUID function support on each CPU and save it for later use,
obviating the need to play the toggle EFLAGS.ID game every time. C code
is looking at ->cpuid_level anyway.

Signed-off-by: Borislav Petkov <bp@suse.de>
---
 arch/x86/kernel/head_32.S | 48 +++++++++++++++++++++++------------------------
 1 file changed, 23 insertions(+), 25 deletions(-)

diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index f4d919e2cd2b..534397ba226c 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -318,30 +318,37 @@ default_entry:
 	movl %eax,%cr0
 
 /*
- *	New page tables may be in 4Mbyte page mode and may
- *	be using the global pages. 
+ * Initialize EFLAGS. Some BIOSes leave bits like NT set. This would confuse the
+ * debugger if this code is traced. Best to initialize before switching to
+ * protected mode. As a side effect, we clear DF too because GCC expects it so.
+ */
+	pushl $0
+	popfl
+
+/*
+ * New page tables may be in 4Mbyte page mode and may be using the global pages.
  *
- *	NOTE! If we are on a 486 we may have no cr4 at all!
- *	Specifically, cr4 exists if and only if CPUID exists
- *	and has flags other than the FPU flag set.
+ * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
+ * if and only if CPUID exists and has flags other than the FPU flag set.
  */
+	movl $-1,pa(X86_CPUID)		# preset CPUID level
 	movl $X86_EFLAGS_ID,%ecx
 	pushl %ecx
-	popfl
-	pushfl
-	popl %eax
-	pushl $0
-	popfl
+	popfl				# set EFLAGS=ID
 	pushfl
-	popl %edx
-	xorl %edx,%eax
-	testl %ecx,%eax
-	jz 6f			# No ID flag = no CPUID = no CR4
+	popl %eax			# get EFLAGS
+	testl $X86_EFLAGS_ID,%eax	# did EFLAGS.ID remained set?
+	jz 6f				# hw disallowed setting of ID bit
+					# which means no CPUID and no CR4
+
+	xorl %eax,%eax
+	cpuid
+	movl %eax,pa(X86_CPUID)		# save largest std CPUID function
 
 	movl $1,%eax
 	cpuid
-	andl $~1,%edx		# Ignore CPUID.FPU
-	jz 6f			# No flags or only CPUID.FPU = no CR4
+	andl $~1,%edx			# Ignore CPUID.FPU
+	jz 6f				# No flags or only CPUID.FPU = no CR4
 
 	movl pa(mmu_cr4_features),%eax
 	movl %eax,%cr4
@@ -389,14 +396,6 @@ default_entry:
 	addl $__PAGE_OFFSET, %esp
 
 /*
- * Initialize eflags.  Some BIOS's leave bits like NT set.  This would
- * confuse the debugger if this code is traced.
- * XXX - best to initialize before switching to protected mode.
- */
-	pushl $0
-	popfl
-
-/*
  * start system 32-bit setup. We need to re-do some of the things done
  * in 16-bit mode for the "real" operations.
  */
@@ -472,7 +471,6 @@ is486:	movl $0x50022,%ecx	# set AM, WP, NE and MP
 	xorl %eax,%eax			# Clear LDT
 	lldt %ax
 
-	cld			# gcc2 wants the direction flag cleared at all times
 	pushl $0		# fake return address for unwinder
 	jmp *(initial_code)
 
-- 
1.8.1.3.535.ga923c31

Re: [PATCH 2/5 -v2.1] x86: Detect CPUID support early at boot

[H. Peter Anvin]

On 02/09/2013 03:16 PM, Borislav Petkov wrote:
> From: Borislav Petkov <bp@suse.de>
>
> We detect CPUID function support on each CPU and save it for later use,
> obviating the need to play the toggle EFLAGS.ID game every time. C code
> is looking at ->cpuid_level anyway.
>
> Signed-off-by: Borislav Petkov <bp@suse.de>
> ---
>   arch/x86/kernel/head_32.S | 48 +++++++++++++++++++++++------------------------
>   1 file changed, 23 insertions(+), 25 deletions(-)
>
> diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
> index f4d919e2cd2b..534397ba226c 100644
> --- a/arch/x86/kernel/head_32.S
> +++ b/arch/x86/kernel/head_32.S
> @@ -318,30 +318,37 @@ default_entry:
>   	movl %eax,%cr0
>
>   /*
> - *	New page tables may be in 4Mbyte page mode and may
> - *	be using the global pages.
> + * Initialize EFLAGS. Some BIOSes leave bits like NT set. This would confuse the
> + * debugger if this code is traced. Best to initialize before switching to
> + * protected mode. As a side effect, we clear DF too because GCC expects it so.
> + */
> +	pushl $0
> +	popfl
> +

I wouldn't really call it a "side effect".  Perhaps the right thing here 
is to say something like "we want to start out with %eflags 
unambiguously clear".

(Note also we have had to CLD earlier because we have already copied the 
command line.)

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

Re: [PATCH 2/5 -v2.1] x86: Detect CPUID support early at boot

[Borislav Petkov]

On Sat, Feb 09, 2013 at 08:34:53PM -0800, H. Peter Anvin wrote:
> I wouldn't really call it a "side effect". Perhaps the right thing
> here is to say something like "we want to start out with %eflags
> unambiguously clear".
>
> (Note also we have had to CLD earlier because we have already copied
> the command line.)

Ok, let's make it even more verbose so that people know in the future:

"... we want to start out with EFLAGS unambiguously clear. That means DF
in particular (even though we have cleared it earlier after copying the
command line) because GCC expects it."

How does that sound?

Also, I was wondering about the whole reasoning behind that: do you know
why DF=0 is a GCC requirement? I mean, nothing hurts GCC from issuing a
CLD each time?

Thanks.

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
--

Re: [PATCH 2/5 -v2.1] x86: Detect CPUID support early at boot

[H. Peter Anvin]

Sure it does... it takes time.

Borislav Petkov <bp@alien8.de> wrote:

>On Sat, Feb 09, 2013 at 08:34:53PM -0800, H. Peter Anvin wrote:
>> I wouldn't really call it a "side effect". Perhaps the right thing
>> here is to say something like "we want to start out with %eflags
>> unambiguously clear".
>>
>> (Note also we have had to CLD earlier because we have already copied
>> the command line.)
>
>Ok, let's make it even more verbose so that people know in the future:
>
>"... we want to start out with EFLAGS unambiguously clear. That means
>DF
>in particular (even though we have cleared it earlier after copying the
>command line) because GCC expects it."
>
>How does that sound?
>
>Also, I was wondering about the whole reasoning behind that: do you
>know
>why DF=0 is a GCC requirement? I mean, nothing hurts GCC from issuing a
>CLD each time?
>
>Thanks.

-- 
Sent from my mobile phone. Please excuse brevity and lack of formatting.