From: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
To: Jon Hunter <jon-hunter-l0cyMroinI0@public.gmane.org>
Cc: device-tree
<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
linux-omap <linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-arm
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH] ARM: dts: OMAP4+: Correct L3 interrupts
Date: Fri, 5 Apr 2013 11:56:54 +0530 [thread overview]
Message-ID: <515E6EAE.9000107@ti.com> (raw)
In-Reply-To: <1365098790-9078-1-git-send-email-jon-hunter-l0cyMroinI0@public.gmane.org>
On Thursday 04 April 2013 11:36 PM, Jon Hunter wrote:
> The L3 interrupt numbers are incorrect for OMAP4+ and are conflicting
> with some of the timer interrupts causing the allocation of timer
> interrupts to fail.
>
> The problem is caused by adding 32 to the interrupt number for the L3
> interrupts to account for per processor interrupts (PPI) and software
> generated interrupts (SGI) which typically are mapped to the first 32
> interrupts in the ARM GIC. This is not necessary because the first
> parameter of the ARM GIC interrupt property specifies the GIC interrupt
> type (ie. SGI, PPI, etc). Hence, fix the interrupt number fo the L3
> interrupts by substracting 32.
>
> Cc: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Jon Hunter <jon-hunter-l0cyMroinI0@public.gmane.org>
> ---
>
> Please note that this problem is observed in Benoit's for_3.10/dts branch [1].
>
> [1] http://git.kernel.org/cgit/linux/kernel/git/bcousson/linux-omap-dt.git
>
Thats correct. I overlooked the 32 addition part. This patch should
also be pulled into Benoit's 3.10 tree.
For the patch,
Acked-by: Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org>
WARNING: multiple messages have this Message-ID (diff)
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dts: OMAP4+: Correct L3 interrupts
Date: Fri, 5 Apr 2013 11:56:54 +0530 [thread overview]
Message-ID: <515E6EAE.9000107@ti.com> (raw)
In-Reply-To: <1365098790-9078-1-git-send-email-jon-hunter@ti.com>
On Thursday 04 April 2013 11:36 PM, Jon Hunter wrote:
> The L3 interrupt numbers are incorrect for OMAP4+ and are conflicting
> with some of the timer interrupts causing the allocation of timer
> interrupts to fail.
>
> The problem is caused by adding 32 to the interrupt number for the L3
> interrupts to account for per processor interrupts (PPI) and software
> generated interrupts (SGI) which typically are mapped to the first 32
> interrupts in the ARM GIC. This is not necessary because the first
> parameter of the ARM GIC interrupt property specifies the GIC interrupt
> type (ie. SGI, PPI, etc). Hence, fix the interrupt number fo the L3
> interrupts by substracting 32.
>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: Jon Hunter <jon-hunter@ti.com>
> ---
>
> Please note that this problem is observed in Benoit's for_3.10/dts branch [1].
>
> [1] http://git.kernel.org/cgit/linux/kernel/git/bcousson/linux-omap-dt.git
>
Thats correct. I overlooked the 32 addition part. This patch should
also be pulled into Benoit's 3.10 tree.
For the patch,
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
next prev parent reply other threads:[~2013-04-05 6:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-04 18:06 [PATCH] ARM: dts: OMAP4+: Correct L3 interrupts Jon Hunter
2013-04-04 18:06 ` Jon Hunter
[not found] ` <1365098790-9078-1-git-send-email-jon-hunter-l0cyMroinI0@public.gmane.org>
2013-04-05 6:26 ` Santosh Shilimkar [this message]
2013-04-05 6:26 ` Santosh Shilimkar
[not found] ` <515E6EAE.9000107-l0cyMroinI0@public.gmane.org>
2013-04-05 8:08 ` Benoit Cousson
2013-04-05 8:08 ` Benoit Cousson
2013-04-05 8:22 ` Benoit Cousson
2013-04-05 8:22 ` Benoit Cousson
2013-04-05 8:25 ` Santosh Shilimkar
2013-04-05 8:25 ` Santosh Shilimkar
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