From: Stephen Warren <swarren@wwwdotorg.org>
To: Jay Agarwal <jagarwal@nvidia.com>
Cc: linux@arm.linux.org.uk, thierry.reding@avionic-design.de,
ldewangan@nvidia.com, bhelgaas@google.com, olof@lixom.net,
hdoyu@nvidia.com, pgaikwad@nvidia.com, mturquette@linaro.org,
pdeschrijver@nvidia.com, linux-arm-kernel@lists.infradead.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, jtukkinen@nvidia.com,
kthota@nvidia.com
Subject: Re: [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support
Date: Wed, 10 Apr 2013 11:23:13 -0600 [thread overview]
Message-ID: <5165A001.9030408@wwwdotorg.org> (raw)
In-Reply-To: <1365435688-4179-1-git-send-email-jagarwal@nvidia.com>
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
> Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
>
> - Enable pcie root port 2 for cardhu
> - Make private data structure for each SOC
> - Add required tegra3 clocks and regulators
> - Add tegra3 specific code in enable controller
> - Modify clock tree to get clocks based on device
> - Based on git://gitorious.org/thierryreding/linux.git
Did you test these patches? They don't work for me on my Cardhu A04.
First off, I had to change the num-lanes properties to match Cardhu's
actual configuration:
> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> index d64d12c..6426226 100644
> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> @@ -143,8 +143,17 @@
> vdd-supply = <&ldo1_reg>;
> avdd-supply = <&ldo2_reg>;
>
> + pci@1,0 {
> + nvidia,num-lanes = <4>;
> + };
> +
> + pci@2,0 {
> + nvidia,num-lanes = <1>;
> + };
> +
> pci@3,0 {
> status = "okay";
> + nvidia,num-lanes = <1>;
> };
> };
>
However, even after doing that, the driver doesn't detect anything
attached to port@3,0, even though I have the board plugged into the
docking station, and hence the PCI Ethernet should be detected:
> [ 3.103860] tegra-pcie 3000.pcie-controller: 4x1, 1x2 configuration
> [ 3.113755] tegra-pcie 3000.pcie-controller: probing port 2, using 1 lanes
> [ 3.324364] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.534249] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.744160] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.751359] tegra-pcie 3000.pcie-controller: link 2 down, ignoring
(I see the same messages even without fixing the lane configuration,
exception for the first configuration message obviously prints something
different).
Are you testing with U-Boot, or using our binary bootloader? Upstream
code must be tested with U-Boot, to make sure it doesn't rely on any HW
programming performed by the bootloader.
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Jay Agarwal <jagarwal-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org,
ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org,
hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
pgaikwad-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
jtukkinen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
kthota-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support
Date: Wed, 10 Apr 2013 11:23:13 -0600 [thread overview]
Message-ID: <5165A001.9030408@wwwdotorg.org> (raw)
In-Reply-To: <1365435688-4179-1-git-send-email-jagarwal-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
> Signed-off-by: Jay Agarwal <jagarwal-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> - Enable pcie root port 2 for cardhu
> - Make private data structure for each SOC
> - Add required tegra3 clocks and regulators
> - Add tegra3 specific code in enable controller
> - Modify clock tree to get clocks based on device
> - Based on git://gitorious.org/thierryreding/linux.git
Did you test these patches? They don't work for me on my Cardhu A04.
First off, I had to change the num-lanes properties to match Cardhu's
actual configuration:
> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> index d64d12c..6426226 100644
> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> @@ -143,8 +143,17 @@
> vdd-supply = <&ldo1_reg>;
> avdd-supply = <&ldo2_reg>;
>
> + pci@1,0 {
> + nvidia,num-lanes = <4>;
> + };
> +
> + pci@2,0 {
> + nvidia,num-lanes = <1>;
> + };
> +
> pci@3,0 {
> status = "okay";
> + nvidia,num-lanes = <1>;
> };
> };
>
However, even after doing that, the driver doesn't detect anything
attached to port@3,0, even though I have the board plugged into the
docking station, and hence the PCI Ethernet should be detected:
> [ 3.103860] tegra-pcie 3000.pcie-controller: 4x1, 1x2 configuration
> [ 3.113755] tegra-pcie 3000.pcie-controller: probing port 2, using 1 lanes
> [ 3.324364] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.534249] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.744160] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.751359] tegra-pcie 3000.pcie-controller: link 2 down, ignoring
(I see the same messages even without fixing the lane configuration,
exception for the first configuration message obviously prints something
different).
Are you testing with U-Boot, or using our binary bootloader? Upstream
code must be tested with U-Boot, to make sure it doesn't rely on any HW
programming performed by the bootloader.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support
Date: Wed, 10 Apr 2013 11:23:13 -0600 [thread overview]
Message-ID: <5165A001.9030408@wwwdotorg.org> (raw)
In-Reply-To: <1365435688-4179-1-git-send-email-jagarwal@nvidia.com>
On 04/08/2013 09:41 AM, Jay Agarwal wrote:
> Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
>
> - Enable pcie root port 2 for cardhu
> - Make private data structure for each SOC
> - Add required tegra3 clocks and regulators
> - Add tegra3 specific code in enable controller
> - Modify clock tree to get clocks based on device
> - Based on git://gitorious.org/thierryreding/linux.git
Did you test these patches? They don't work for me on my Cardhu A04.
First off, I had to change the num-lanes properties to match Cardhu's
actual configuration:
> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> index d64d12c..6426226 100644
> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> @@ -143,8 +143,17 @@
> vdd-supply = <&ldo1_reg>;
> avdd-supply = <&ldo2_reg>;
>
> + pci at 1,0 {
> + nvidia,num-lanes = <4>;
> + };
> +
> + pci at 2,0 {
> + nvidia,num-lanes = <1>;
> + };
> +
> pci at 3,0 {
> status = "okay";
> + nvidia,num-lanes = <1>;
> };
> };
>
However, even after doing that, the driver doesn't detect anything
attached to port at 3,0, even though I have the board plugged into the
docking station, and hence the PCI Ethernet should be detected:
> [ 3.103860] tegra-pcie 3000.pcie-controller: 4x1, 1x2 configuration
> [ 3.113755] tegra-pcie 3000.pcie-controller: probing port 2, using 1 lanes
> [ 3.324364] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.534249] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.744160] tegra-pcie 3000.pcie-controller: link 2 down, retrying
> [ 3.751359] tegra-pcie 3000.pcie-controller: link 2 down, ignoring
(I see the same messages even without fixing the lane configuration,
exception for the first configuration message obviously prints something
different).
Are you testing with U-Boot, or using our binary bootloader? Upstream
code must be tested with U-Boot, to make sure it doesn't rely on any HW
programming performed by the bootloader.
next prev parent reply other threads:[~2013-04-10 17:23 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-08 15:41 [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 15:41 ` [PATCH 2/3] ARM: dts: tegra: Correct PCIe entry Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 18:27 ` Stephen Warren
2013-04-08 18:27 ` Stephen Warren
2013-04-09 8:30 ` Peter De Schrijver
2013-04-09 8:30 ` Peter De Schrijver
2013-04-09 15:46 ` Stephen Warren
2013-04-09 15:46 ` Stephen Warren
2013-04-12 15:03 ` Jay Agarwal
2013-04-12 15:03 ` Jay Agarwal
2013-04-12 15:03 ` Jay Agarwal
2013-04-08 15:41 ` [PATCH 3/3] ARM: dts: tegra: Add PCIe entry for cardhu Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 15:41 ` Jay Agarwal
2013-04-08 18:32 ` Stephen Warren
2013-04-08 18:32 ` Stephen Warren
2013-04-08 18:11 ` [PATCH 1/3] ARM: tegra: pcie: Add tegra3 support Stephen Warren
2013-04-08 18:11 ` Stephen Warren
2013-04-12 14:58 ` Jay Agarwal
2013-04-12 14:58 ` Jay Agarwal
2013-04-12 14:58 ` Jay Agarwal
2013-04-12 15:34 ` Stephen Warren
2013-04-12 15:34 ` Stephen Warren
2013-04-13 10:23 ` Thierry Reding
2013-04-13 10:23 ` Thierry Reding
2013-04-08 18:21 ` Stephen Warren
2013-04-08 18:21 ` Stephen Warren
2013-04-12 16:43 ` Jay Agarwal
2013-04-12 16:43 ` Jay Agarwal
2013-04-12 16:43 ` Jay Agarwal
2013-04-12 17:01 ` Stephen Warren
2013-04-12 17:01 ` Stephen Warren
2013-04-12 17:06 ` Jay Agarwal
2013-04-12 17:06 ` Jay Agarwal
2013-04-12 18:29 ` Stephen Warren
2013-04-12 18:29 ` Stephen Warren
2013-04-10 17:23 ` Stephen Warren [this message]
2013-04-10 17:23 ` Stephen Warren
2013-04-10 17:23 ` Stephen Warren
2013-05-06 19:49 ` Stephen Warren
2013-05-06 19:49 ` Stephen Warren
2013-05-06 19:49 ` Stephen Warren
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