[Qemu-devel] [PATCH 0/6] target-i386:do some cleanups

[Qemu-devel] [PATCH 0/6] target-i386:do some cleanups

[liguang]

here are some cleanups

Li Guang (6)
	 target-i386/seg_helper: replace env->eip with EIP
	 target-i386/smm_helper: replace env->eip with EIP
	 target-i386/svm_helper: replace env->eip with EIP
	 target-i386/svm_helper: remove redundant assignment
	 target-i386/seg_helper: refactor 4 helper functions
	 target-i386/seg_helper: define names for code/data segment types

target-i386/seg_helper.c | 296 +++++++++++++++++++++++-----------------------
target-i386/smm_helper.c | 10 +++++-----
target-i386/svm_helper.c | 6 +++---
3 files changed, 139 insertions(+), 174 deletions(-)

[Qemu-devel] [PATCH 1/6] target-i386/seg_helper: replace env->eip with EIP

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/seg_helper.c |   46 +++++++++++++++++++++++-----------------------
 1 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 906e4f3..5f7f99d 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -388,7 +388,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
 
     /* load all registers without an exception, then reload them with
        possible exception */
-    env->eip = new_eip;
+    EIP = new_eip;
     eflags_mask = TF_MASK | AC_MASK | ID_MASK |
         IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK;
     if (!(type & 8)) {
@@ -567,7 +567,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
     if (is_int) {
         old_eip = next_eip;
     } else {
-        old_eip = env->eip;
+        old_eip = EIP;
     }
 
     dt = &env->idt;
@@ -755,7 +755,7 @@ static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
                    get_seg_limit(e1, e2),
                    e2);
     cpu_x86_set_cpl(env, dpl);
-    env->eip = offset;
+    EIP = offset;
 
     /* interrupt gate clear IF mask */
     if ((type & 1) == 0) {
@@ -815,7 +815,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
     if (is_int) {
         old_eip = next_eip;
     } else {
-        old_eip = env->eip;
+        old_eip = EIP;
     }
 
     dt = &env->idt;
@@ -919,7 +919,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
                    get_seg_limit(e1, e2),
                    e2);
     cpu_x86_set_cpl(env, dpl);
-    env->eip = offset;
+    EIP = offset;
 
     /* interrupt gate clear IF mask */
     if ((type & 1) == 0) {
@@ -934,7 +934,7 @@ static void do_interrupt64(CPUX86State *env, int intno, int is_int,
 void helper_syscall(CPUX86State *env, int next_eip_addend)
 {
     env->exception_index = EXCP_SYSCALL;
-    env->exception_next_eip = env->eip + next_eip_addend;
+    env->exception_next_eip = EIP + next_eip_addend;
     cpu_loop_exit(env);
 }
 #else
@@ -949,7 +949,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend)
     if (env->hflags & HF_LMA_MASK) {
         int code64;
 
-        ECX = env->eip + next_eip_addend;
+        ECX = EIP + next_eip_addend;
         env->regs[11] = cpu_compute_eflags(env);
 
         code64 = env->hflags & HF_CS64_MASK;
@@ -969,12 +969,12 @@ void helper_syscall(CPUX86State *env, int next_eip_addend)
         env->eflags &= ~env->fmask;
         cpu_load_eflags(env, env->eflags, 0);
         if (code64) {
-            env->eip = env->lstar;
+            EIP = env->lstar;
         } else {
-            env->eip = env->cstar;
+            EIP = env->cstar;
         }
     } else {
-        ECX = (uint32_t)(env->eip + next_eip_addend);
+        ECX = (uint32_t)(EIP + next_eip_addend);
 
         cpu_x86_set_cpl(env, 0);
         cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc,
@@ -988,7 +988,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend)
                                DESC_S_MASK |
                                DESC_W_MASK | DESC_A_MASK);
         env->eflags &= ~(IF_MASK | RF_MASK | VM_MASK);
-        env->eip = (uint32_t)env->star;
+        EIP = (uint32_t)env->star;
     }
 }
 #endif
@@ -1015,14 +1015,14 @@ void helper_sysret(CPUX86State *env, int dflag)
                                    DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
                                    DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK |
                                    DESC_L_MASK);
-            env->eip = ECX;
+            EIP = ECX;
         } else {
             cpu_x86_load_seg_cache(env, R_CS, selector | 3,
                                    0, 0xffffffff,
                                    DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
                                    DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
                                    DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK);
-            env->eip = (uint32_t)ECX;
+            EIP = (uint32_t)ECX;
         }
         cpu_x86_load_seg_cache(env, R_SS, selector + 8,
                                0, 0xffffffff,
@@ -1039,7 +1039,7 @@ void helper_sysret(CPUX86State *env, int dflag)
                                DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
                                DESC_S_MASK | (3 << DESC_DPL_SHIFT) |
                                DESC_CS_MASK | DESC_R_MASK | DESC_A_MASK);
-        env->eip = (uint32_t)ECX;
+        EIP = (uint32_t)ECX;
         cpu_x86_load_seg_cache(env, R_SS, selector + 8,
                                0, 0xffffffff,
                                DESC_G_MASK | DESC_B_MASK | DESC_P_MASK |
@@ -1074,7 +1074,7 @@ static void do_interrupt_real(CPUX86State *env, int intno, int is_int,
     if (is_int) {
         old_eip = next_eip;
     } else {
-        old_eip = env->eip;
+        old_eip = EIP;
     }
     old_cs = env->segs[R_CS].selector;
     /* XXX: use SS segment size? */
@@ -1084,7 +1084,7 @@ static void do_interrupt_real(CPUX86State *env, int intno, int is_int,
 
     /* update processor state */
     ESP = (ESP & ~0xffff) | (esp & 0xffff);
-    env->eip = offset;
+    EIP = offset;
     env->segs[R_CS].selector = selector;
     env->segs[R_CS].base = (selector << 4);
     env->eflags &= ~(IF_MASK | TF_MASK | AC_MASK | RF_MASK);
@@ -1185,7 +1185,7 @@ static void do_interrupt_all(CPUX86State *env, int intno, int is_int,
                 target_ulong ptr;
 
                 qemu_log("       code=");
-                ptr = env->segs[R_CS].base + env->eip;
+                ptr = env->segs[R_CS].base + EIP;
                 for (i = 0; i < 16; i++) {
                     qemu_log(" %02x", ldub(ptr + i));
                 }
@@ -1596,7 +1596,7 @@ void helper_ljmp_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
             if (dpl < cpl || dpl < rpl) {
                 raise_exception_err(env, EXCP0D_GPF, new_cs & 0xfffc);
             }
-            next_eip = env->eip + next_eip_addend;
+            next_eip = EIP + next_eip_addend;
             switch_tss(env, new_cs, e1, e2, SWITCH_TSS_JMP, next_eip);
             CC_OP = CC_OP_EFLAGS;
             break;
@@ -1665,7 +1665,7 @@ void helper_lcall_real(CPUX86State *env, int new_cs, target_ulong new_eip1,
     }
 
     SET_ESP(esp, esp_mask);
-    env->eip = new_eip;
+    EIP = new_eip;
     env->segs[R_CS].selector = new_cs;
     env->segs[R_CS].base = (new_cs << 4);
 }
@@ -1680,7 +1680,7 @@ void helper_lcall_protected(CPUX86State *env, int new_cs, target_ulong new_eip,
     uint32_t val, limit, old_sp_mask;
     target_ulong ssp, old_ssp, next_eip;
 
-    next_eip = env->eip + next_eip_addend;
+    next_eip = EIP + next_eip_addend;
     LOG_PCALL("lcall %04x:%08x s=%d\n", new_cs, (uint32_t)new_eip, shift);
     LOG_PCALL_STATE(env);
     if ((new_cs & 0xfffc) == 0) {
@@ -1922,7 +1922,7 @@ void helper_iret_real(CPUX86State *env, int shift)
     ESP = (ESP & ~sp_mask) | (sp & sp_mask);
     env->segs[R_CS].selector = new_cs;
     env->segs[R_CS].base = (new_cs << 4);
-    env->eip = new_eip;
+    EIP = new_eip;
     if (env->eflags & VM_MASK) {
         eflags_mask = TF_MASK | AC_MASK | ID_MASK | IF_MASK | RF_MASK |
             NT_MASK;
@@ -2140,7 +2140,7 @@ static inline void helper_ret_protected(CPUX86State *env, int shift,
         sp += addend;
     }
     SET_ESP(sp, sp_mask);
-    env->eip = new_eip;
+    EIP = new_eip;
     if (is_iret) {
         /* NOTE: 'cpl' is the _old_ CPL */
         eflags_mask = TF_MASK | AC_MASK | ID_MASK | RF_MASK | NT_MASK;
@@ -2178,7 +2178,7 @@ static inline void helper_ret_protected(CPUX86State *env, int shift,
     load_seg_vm(env, R_FS, new_fs & 0xffff);
     load_seg_vm(env, R_GS, new_gs & 0xffff);
 
-    env->eip = new_eip & 0xffff;
+    EIP = new_eip & 0xffff;
     ESP = new_esp;
 }
 
-- 
1.7.2.5

[Qemu-devel] [PATCH 2/6] target-i386/smm_helper: replace env->eip with EIP

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/smm_helper.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c
index eea2fe9..ba79075 100644
--- a/target-i386/smm_helper.c
+++ b/target-i386/smm_helper.c
@@ -93,7 +93,7 @@ void do_smm_enter(CPUX86State *env)
     for (i = 8; i < 16; i++) {
         stq_phys(sm_state + 0x7ff8 - i * 8, env->regs[i]);
     }
-    stq_phys(sm_state + 0x7f78, env->eip);
+    stq_phys(sm_state + 0x7f78, EIP);
     stl_phys(sm_state + 0x7f70, cpu_compute_eflags(env));
     stl_phys(sm_state + 0x7f68, env->dr[6]);
     stl_phys(sm_state + 0x7f60, env->dr[7]);
@@ -108,7 +108,7 @@ void do_smm_enter(CPUX86State *env)
     stl_phys(sm_state + 0x7ffc, env->cr[0]);
     stl_phys(sm_state + 0x7ff8, env->cr[3]);
     stl_phys(sm_state + 0x7ff4, cpu_compute_eflags(env));
-    stl_phys(sm_state + 0x7ff0, env->eip);
+    stl_phys(sm_state + 0x7ff0, EIP);
     stl_phys(sm_state + 0x7fec, EDI);
     stl_phys(sm_state + 0x7fe8, ESI);
     stl_phys(sm_state + 0x7fe4, EBP);
@@ -160,7 +160,7 @@ void do_smm_enter(CPUX86State *env)
 #endif
     cpu_load_eflags(env, 0, ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C |
                               DF_MASK));
-    env->eip = 0x00008000;
+    EIP = 0x00008000;
     cpu_x86_load_seg_cache(env, R_CS, (env->smbase >> 4) & 0xffff, env->smbase,
                            0xffffffff, 0);
     cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffffffff, 0);
@@ -224,7 +224,7 @@ void helper_rsm(CPUX86State *env)
     for (i = 8; i < 16; i++) {
         env->regs[i] = ldq_phys(sm_state + 0x7ff8 - i * 8);
     }
-    env->eip = ldq_phys(sm_state + 0x7f78);
+    EIP = ldq_phys(sm_state + 0x7f78);
     cpu_load_eflags(env, ldl_phys(sm_state + 0x7f70),
                     ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
     env->dr[6] = ldl_phys(sm_state + 0x7f68);
@@ -243,7 +243,7 @@ void helper_rsm(CPUX86State *env)
     cpu_x86_update_cr3(env, ldl_phys(sm_state + 0x7ff8));
     cpu_load_eflags(env, ldl_phys(sm_state + 0x7ff4),
                     ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
-    env->eip = ldl_phys(sm_state + 0x7ff0);
+    EIP = ldl_phys(sm_state + 0x7ff0);
     EDI = ldl_phys(sm_state + 0x7fec);
     ESI = ldl_phys(sm_state + 0x7fe8);
     EBP = ldl_phys(sm_state + 0x7fe4);
-- 
1.7.2.5

[Qemu-devel] [PATCH 3/6] target-i386/svm_helper: replace env->eip with EIP

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/svm_helper.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index c46a213..f9ffd18 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -249,7 +249,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
                        R_DS);
 
     EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip));
-    env->eip = EIP;
+    EIP = EIP;
     ESP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp));
     EAX = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax));
     env->dr[7] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7));
@@ -541,7 +541,7 @@ void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param,
         if (lduw_phys(addr + port / 8) & (mask << (port & 7))) {
             /* next EIP */
             stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2),
-                     env->eip + next_eip_addend);
+                     EIP + next_eip_addend);
             helper_vmexit(env, SVM_EXIT_IOIO, param | (port << 16));
         }
     }
@@ -605,7 +605,7 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
     stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags),
              cpu_compute_eflags(env));
     stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip),
-             env->eip);
+             EIP);
     stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP);
     stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX);
     stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]);
-- 
1.7.2.5

[Qemu-devel] [PATCH 4/6] target-i386/svm_helper: remove redundant assignment

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/svm_helper.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index f9ffd18..393b126 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -249,7 +249,6 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
                        R_DS);
 
     EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip));
-    EIP = EIP;
     ESP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp));
     EAX = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax));
     env->dr[7] = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7));
-- 
1.7.2.5

[Qemu-devel] [PATCH 5/6] target-i386/seg_helper: refactor 4 helper functions

[liguang]

for helper_{lsl, lar, verr, verw}, there are
common parts, so move them outside, and then
call this new helper-helper function.

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/seg_helper.c |  179 ++++++++++++++-------------------------------
 1 files changed, 56 insertions(+), 123 deletions(-)

diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 5f7f99d..635c5ab 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -2292,9 +2292,10 @@ void helper_sysexit(CPUX86State *env, int dflag)
     EIP = EDX;
 }
 
-target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
+
+static target_ulong misc_check_helper(CPUX86State *env, target_ulong selector1,
+                                      int inst)
 {
-    unsigned int limit;
     uint32_t e1, e2, eflags, selector;
     int rpl, dpl, cpl, type;
 
@@ -2306,14 +2307,30 @@ target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
     if (load_segment(env, &e1, &e2, selector) != 0) {
         goto fail;
     }
+
+    CC_SRC = eflags & ~CC_Z;
+
     rpl = selector & 3;
     dpl = (e2 >> DESC_DPL_SHIFT) & 3;
     cpl = env->hflags & HF_CPL_MASK;
+
     if (e2 & DESC_S_MASK) {
-        if ((e2 & DESC_CS_MASK) && (e2 & DESC_C_MASK)) {
-            /* conforming */
-        } else {
-            if (dpl < cpl || dpl < rpl) {
+        if (e2 & DESC_CS_MASK) {
+            switch (inst) {
+            case 1:
+                goto fail;
+            case 2:
+                if (!(e2 & (DESC_R_MASK | DESC_C_MASK))) {
+                    goto fail;
+                }
+                break;
+            case 3:
+            case 4:
+                if (!(e2 & DESC_C_MASK)) {
+                    goto check_pl;
+                }
+                break;
+            default:
                 goto fail;
             }
         }
@@ -2325,140 +2342,56 @@ target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
         case 3:
         case 9:
         case 11:
-            break;
+            if (inst == 3) {
+                break;
+            }
+        case 5:
+        case 12:
+            if (inst == 4) {
+                break;
+            }
         default:
             goto fail;
         }
-        if (dpl < cpl || dpl < rpl) {
-        fail:
-            CC_SRC = eflags & ~CC_Z;
-            return 0;
-        }
+        goto check_pl;
+    }
+
+    if (inst == 3) {
+        e2 &= 0x00f0ff00;
     }
-    limit = get_seg_limit(e1, e2);
+    if (inst == 4) {
+        e2 = get_seg_limit(e1, e2);
+    }
+
     CC_SRC = eflags | CC_Z;
-    return limit;
+
+check_pl:
+    if (dpl < cpl || dpl < rpl) {
+        goto fail;
+    }
+
+fail:
+    return e2;
 }
 
-target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
+target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
 {
-    uint32_t e1, e2, eflags, selector;
-    int rpl, dpl, cpl, type;
+    return misc_check_helper(env, selector1, 4);
+}
 
-    selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
-    if ((selector & 0xfffc) == 0) {
-        goto fail;
-    }
-    if (load_segment(env, &e1, &e2, selector) != 0) {
-        goto fail;
-    }
-    rpl = selector & 3;
-    dpl = (e2 >> DESC_DPL_SHIFT) & 3;
-    cpl = env->hflags & HF_CPL_MASK;
-    if (e2 & DESC_S_MASK) {
-        if ((e2 & DESC_CS_MASK) && (e2 & DESC_C_MASK)) {
-            /* conforming */
-        } else {
-            if (dpl < cpl || dpl < rpl) {
-                goto fail;
-            }
-        }
-    } else {
-        type = (e2 >> DESC_TYPE_SHIFT) & 0xf;
-        switch (type) {
-        case 1:
-        case 2:
-        case 3:
-        case 4:
-        case 5:
-        case 9:
-        case 11:
-        case 12:
-            break;
-        default:
-            goto fail;
-        }
-        if (dpl < cpl || dpl < rpl) {
-        fail:
-            CC_SRC = eflags & ~CC_Z;
-            return 0;
-        }
-    }
-    CC_SRC = eflags | CC_Z;
-    return e2 & 0x00f0ff00;
+target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
+{
+    return misc_check_helper(env, selector1, 3);
 }
 
 void helper_verr(CPUX86State *env, target_ulong selector1)
 {
-    uint32_t e1, e2, eflags, selector;
-    int rpl, dpl, cpl;
-
-    selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
-    if ((selector & 0xfffc) == 0) {
-        goto fail;
-    }
-    if (load_segment(env, &e1, &e2, selector) != 0) {
-        goto fail;
-    }
-    if (!(e2 & DESC_S_MASK)) {
-        goto fail;
-    }
-    rpl = selector & 3;
-    dpl = (e2 >> DESC_DPL_SHIFT) & 3;
-    cpl = env->hflags & HF_CPL_MASK;
-    if (e2 & DESC_CS_MASK) {
-        if (!(e2 & DESC_R_MASK)) {
-            goto fail;
-        }
-        if (!(e2 & DESC_C_MASK)) {
-            if (dpl < cpl || dpl < rpl) {
-                goto fail;
-            }
-        }
-    } else {
-        if (dpl < cpl || dpl < rpl) {
-        fail:
-            CC_SRC = eflags & ~CC_Z;
-            return;
-        }
-    }
-    CC_SRC = eflags | CC_Z;
+    misc_check_helper(env, selector1, 2);
 }
 
 void helper_verw(CPUX86State *env, target_ulong selector1)
 {
-    uint32_t e1, e2, eflags, selector;
-    int rpl, dpl, cpl;
-
-    selector = selector1 & 0xffff;
-    eflags = cpu_cc_compute_all(env, CC_OP);
-    if ((selector & 0xfffc) == 0) {
-        goto fail;
-    }
-    if (load_segment(env, &e1, &e2, selector) != 0) {
-        goto fail;
-    }
-    if (!(e2 & DESC_S_MASK)) {
-        goto fail;
-    }
-    rpl = selector & 3;
-    dpl = (e2 >> DESC_DPL_SHIFT) & 3;
-    cpl = env->hflags & HF_CPL_MASK;
-    if (e2 & DESC_CS_MASK) {
-        goto fail;
-    } else {
-        if (dpl < cpl || dpl < rpl) {
-            goto fail;
-        }
-        if (!(e2 & DESC_W_MASK)) {
-        fail:
-            CC_SRC = eflags & ~CC_Z;
-            return;
-        }
-    }
-    CC_SRC = eflags | CC_Z;
+    misc_check_helper(env, selector1, 1);
 }
 
 #if defined(CONFIG_USER_ONLY)
-- 
1.7.2.5

[Qemu-devel] [PATCH 6/6] target-i386/seg_helper: define names for code/data segment types

[liguang]

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
---
 target-i386/seg_helper.c |   71 +++++++++++++++++++++++++++++++++------------
 1 files changed, 52 insertions(+), 19 deletions(-)

diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 635c5ab..aed5499 100644
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -2292,6 +2292,39 @@ void helper_sysexit(CPUX86State *env, int dflag)
     EIP = EDX;
 }
 
+/*
+ * for data segment types
+ * RO -- read-only, A -- accessed,
+ * W -- write, E -- expand-down
+ */
+#define DESC_DSEG_RO 0
+#define DESC_DSEG_ROA 1
+#define DESC_DSEG_RW 2
+#define DESC_DSEG_RWA 3
+#define DESC_DSEG_ROE 4
+#define DESC_DSEG_ROEA 5
+#define DESC_DSEG_RWE 6
+#define DESC_DSEG_RWEA 7
+
+/*
+ * for code segment types
+ * EO -- execute-only, A -- accessed,
+ * C -- conforming, E -- expand-down, R -- read
+ */
+
+#define DESC_CSEG_EO 8
+#define DESC_CSEG_EOA 9
+#define DESC_CSEG_ER 10
+#define DESC_CSEG_ERA 11
+#define DESC_CSEG_EOC 12
+#define DESC_CSEG_EOCA 13
+#define DESC_CSEG_ERC 14
+#define DESC_CSEG_ERCA 15
+
+#define FUNC_LSL 4
+#define FUNC_LAR 3
+#define FUNC_VERR 2
+#define FUNC_VERW 1
 
 static target_ulong misc_check_helper(CPUX86State *env, target_ulong selector1,
                                       int inst)
@@ -2317,15 +2350,15 @@ static target_ulong misc_check_helper(CPUX86State *env, target_ulong selector1,
     if (e2 & DESC_S_MASK) {
         if (e2 & DESC_CS_MASK) {
             switch (inst) {
-            case 1:
+            case FUNC_VERW:
                 goto fail;
-            case 2:
+            case FUNC_VERR:
                 if (!(e2 & (DESC_R_MASK | DESC_C_MASK))) {
                     goto fail;
                 }
                 break;
-            case 3:
-            case 4:
+            case FUNC_LAR:
+            case FUNC_LSL:
                 if (!(e2 & DESC_C_MASK)) {
                     goto check_pl;
                 }
@@ -2337,17 +2370,17 @@ static target_ulong misc_check_helper(CPUX86State *env, target_ulong selector1,
     } else {
         type = (e2 >> DESC_TYPE_SHIFT) & 0xf;
         switch (type) {
-        case 1:
-        case 2:
-        case 3:
-        case 9:
-        case 11:
-            if (inst == 3) {
+        case DESC_DSEG_ROA:
+        case DESC_DSEG_RW:
+        case DESC_DSEG_RWA:
+        case DESC_CSEG_EOA:
+        case  DESC_CSEG_ERA:
+            if (inst == FUNC_LAR) {
                 break;
             }
-        case 5:
-        case 12:
-            if (inst == 4) {
+        case DESC_DSEG_ROEA:
+        case DESC_CSEG_EOC:
+            if (inst == FUNC_LSL) {
                 break;
             }
         default:
@@ -2356,10 +2389,10 @@ static target_ulong misc_check_helper(CPUX86State *env, target_ulong selector1,
         goto check_pl;
     }
 
-    if (inst == 3) {
+    if (inst == FUNC_LAR) {
         e2 &= 0x00f0ff00;
     }
-    if (inst == 4) {
+    if (inst == FUNC_LSL) {
         e2 = get_seg_limit(e1, e2);
     }
 
@@ -2376,22 +2409,22 @@ fail:
 
 target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
 {
-    return misc_check_helper(env, selector1, 4);
+    return misc_check_helper(env, selector1, FUNC_LSL);
 }
 
 target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
 {
-    return misc_check_helper(env, selector1, 3);
+    return misc_check_helper(env, selector1, FUNC_LAR);
 }
 
 void helper_verr(CPUX86State *env, target_ulong selector1)
 {
-    misc_check_helper(env, selector1, 2);
+    misc_check_helper(env, selector1, FUNC_VERR);
 }
 
 void helper_verw(CPUX86State *env, target_ulong selector1)
 {
-    misc_check_helper(env, selector1, 1);
+    misc_check_helper(env, selector1, FUNC_VERW);
 }
 
 #if defined(CONFIG_USER_ONLY)
-- 
1.7.2.5

Re: [Qemu-devel] [PATCH 1/6] target-i386/seg_helper: replace env->eip with EIP

[Richard Henderson]

On 2013-04-19 04:52, liguang wrote:
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
>   target-i386/seg_helper.c |   46 +++++++++++++++++++++++-----------------------
>   1 files changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
> index 906e4f3..5f7f99d 100644
> --- a/target-i386/seg_helper.c
> +++ b/target-i386/seg_helper.c
> @@ -388,7 +388,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
>
>       /* load all registers without an exception, then reload them with
>          possible exception */
> -    env->eip = new_eip;
> +    EIP = new_eip;

IMO this is not a cleanup, and we should in fact be doing the exact opposite,
getting rid of those silly macros.


r~

Re: [Qemu-devel] [PATCH 1/6] target-i386/seg_helper: replace env->eip with EIP

[li guang]

在 2013-04-19五的 09:48 +0200，Richard Henderson写道：
> On 2013-04-19 04:52, liguang wrote:
> > Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> > ---
> >   target-i386/seg_helper.c |   46 +++++++++++++++++++++++-----------------------
> >   1 files changed, 23 insertions(+), 23 deletions(-)
> >
> > diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
> > index 906e4f3..5f7f99d 100644
> > --- a/target-i386/seg_helper.c
> > +++ b/target-i386/seg_helper.c
> > @@ -388,7 +388,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
> >
> >       /* load all registers without an exception, then reload them with
> >          possible exception */
> > -    env->eip = new_eip;
> > +    EIP = new_eip;
> 
> IMO this is not a cleanup, and we should in fact be doing the exact opposite,
> getting rid of those silly macros.
> 

Yes, I have the same feeling.
do you think we can also get rid of ESP, EBP, ...?

Re: [Qemu-devel] [PATCH 1/6] target-i386/seg_helper: replace env->eip with EIP

[Richard Henderson]

On 2013-04-19 09:55, li guang wrote:
> do you think we can also get rid of ESP, EBP, ...?

I don't see why not...


r~