All of lore.kernel.org
 help / color / mirror / Atom feed
From: Suravee Suthikulanit <suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
To: Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	a.p.zijlstra-/NLkJaSkS4VmR6Xm/wNWPw@public.gmane.org
Subject: Re: [PATCH 2/2 V3] perf/x86/amd: AMD IOMMU PC PERF uncore PMU implementation
Date: Tue, 28 May 2013 12:17:28 -0500	[thread overview]
Message-ID: <51A4E6A8.7080004@amd.com> (raw)
In-Reply-To: <20130528121850.GC2575-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>

On 5/28/2013 7:18 AM, Joerg Roedel wrote:
> On Fri, May 17, 2013 at 02:43:32PM -0500, Suthikulpanit, Suravee wrote:
>> diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
>> index b0684e4..fcbd3b8 100644
>> --- a/arch/x86/kernel/cpu/Makefile
>> +++ b/arch/x86/kernel/cpu/Makefile
>> @@ -30,7 +30,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32)		+= umc.o
>>   obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o
>>   
>>   ifdef CONFIG_PERF_EVENTS
>> -obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o perf_event_amd_uncore.o
>> +obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o perf_event_amd_uncore.o perf_event_amd_iommu.o
> This should also depend on CONFIG_AMD_IOMMU. If no IOMMU driver is
> compiled in it doesn't make sense to have that PMU.
I will take care of this.
> +	} else {
> +		return -EINVAL;
> +	}
> +
> +	/* integrate with iommu base devid (0000), assume one iommu */
> +	perf_iommu->max_banks =
> +		amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID);
> +	perf_iommu->max_counters =
> +		amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID);
> +
> +	/* update the hw_perf_event struct with the iommu config data */
> +	hwc->config = config;
> +	hwc->extra_reg.config = config1;
> +
> +	return 0;
> +}
> That implementation is very basic. Any reason for not using the event
> reporting mechanism of the IOMMU? You could implement a nice perf
> iommutop or something to see which devices do the most transactions or
> something like that.
>
>
> 	Joerg
This patch is adding perf system-wide counting mode support which is 
used by "perf stat" tool.  We are not implementing the sampling mode 
since MSI interrupt of the IOMMU cannot be used for current perf 
sampling tools (e.g. perf record or top) since the IOMMU counters are 
not core-specific.   The current "perf record" and "perf top" needs to 
attribute each sample to a particular core/pid which would allow the 
tools to figure out the instruction pointer and map the sample to a 
paticular module.

If I understand correctly, when you mentioned "perf iommutop", you want 
a new perf user-space tool which will show real-time IOMMU events per 
IOMMU HW and/or device?

Suravee

WARNING: multiple messages have this Message-ID (diff)
From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: <linux-kernel@vger.kernel.org>, <a.p.zijlstra@chello.nl>,
	<mingo@redhat.com>, <iommu@lists.linux-foundation.org>
Subject: Re: [PATCH 2/2 V3] perf/x86/amd: AMD IOMMU PC PERF uncore PMU implementation
Date: Tue, 28 May 2013 12:17:28 -0500	[thread overview]
Message-ID: <51A4E6A8.7080004@amd.com> (raw)
In-Reply-To: <20130528121850.GC2575@8bytes.org>

On 5/28/2013 7:18 AM, Joerg Roedel wrote:
> On Fri, May 17, 2013 at 02:43:32PM -0500, Suthikulpanit, Suravee wrote:
>> diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
>> index b0684e4..fcbd3b8 100644
>> --- a/arch/x86/kernel/cpu/Makefile
>> +++ b/arch/x86/kernel/cpu/Makefile
>> @@ -30,7 +30,7 @@ obj-$(CONFIG_CPU_SUP_UMC_32)		+= umc.o
>>   obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o
>>   
>>   ifdef CONFIG_PERF_EVENTS
>> -obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o perf_event_amd_uncore.o
>> +obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o perf_event_amd_uncore.o perf_event_amd_iommu.o
> This should also depend on CONFIG_AMD_IOMMU. If no IOMMU driver is
> compiled in it doesn't make sense to have that PMU.
I will take care of this.
> +	} else {
> +		return -EINVAL;
> +	}
> +
> +	/* integrate with iommu base devid (0000), assume one iommu */
> +	perf_iommu->max_banks =
> +		amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID);
> +	perf_iommu->max_counters =
> +		amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID);
> +
> +	/* update the hw_perf_event struct with the iommu config data */
> +	hwc->config = config;
> +	hwc->extra_reg.config = config1;
> +
> +	return 0;
> +}
> That implementation is very basic. Any reason for not using the event
> reporting mechanism of the IOMMU? You could implement a nice perf
> iommutop or something to see which devices do the most transactions or
> something like that.
>
>
> 	Joerg
This patch is adding perf system-wide counting mode support which is 
used by "perf stat" tool.  We are not implementing the sampling mode 
since MSI interrupt of the IOMMU cannot be used for current perf 
sampling tools (e.g. perf record or top) since the IOMMU counters are 
not core-specific.   The current "perf record" and "perf top" needs to 
attribute each sample to a particular core/pid which would allow the 
tools to figure out the instruction pointer and map the sample to a 
paticular module.

If I understand correctly, when you mentioned "perf iommutop", you want 
a new perf user-space tool which will show real-time IOMMU events per 
IOMMU HW and/or device?

Suravee


  parent reply	other threads:[~2013-05-28 17:17 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-17 19:43 [PATCH 0/2 V3] perf/x86/amd: IOMMU Performance Counter Support suravee.suthikulpanit-5C7GfCeVMHo
2013-05-17 19:43 ` suravee.suthikulpanit
     [not found] ` <1368819813-6481-1-git-send-email-suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2013-05-17 19:43   ` [PATCH 1/2 V3] perf/x86/amd: Adding IOMMU PC resource management suravee.suthikulpanit-5C7GfCeVMHo
2013-05-17 19:43     ` suravee.suthikulpanit
     [not found]     ` <1368819813-6481-2-git-send-email-suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2013-05-28 11:07       ` Joerg Roedel
2013-05-28 11:07         ` Joerg Roedel
     [not found]         ` <20130528110752.GB2575-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-05-28 16:28           ` Suravee Suthikulanit
2013-05-28 16:28             ` Suravee Suthikulanit
2013-05-17 19:43   ` [PATCH 2/2 V3] perf/x86/amd: AMD IOMMU PC PERF uncore PMU implementation suravee.suthikulpanit-5C7GfCeVMHo
2013-05-17 19:43     ` suravee.suthikulpanit
     [not found]     ` <1368819813-6481-3-git-send-email-suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
2013-05-28 12:18       ` Joerg Roedel
2013-05-28 12:18         ` Joerg Roedel
     [not found]         ` <20130528121850.GC2575-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-05-28 17:17           ` Suravee Suthikulanit [this message]
2013-05-28 17:17             ` Suravee Suthikulanit
     [not found]             ` <51A4E6A8.7080004-5C7GfCeVMHo@public.gmane.org>
2013-05-29 11:24               ` Peter Zijlstra
2013-05-29 11:24                 ` Peter Zijlstra
2013-05-20 15:41   ` [PATCH 0/2 V3] perf/x86/amd: IOMMU Performance Counter Support Suravee Suthikulanit
2013-05-20 15:41     ` Suravee Suthikulanit
2013-05-21  9:11     ` Peter Zijlstra
     [not found]       ` <20130521091157.GD26912-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2013-05-21 13:29         ` Suravee Suthikulanit
2013-05-21 13:29           ` Suravee Suthikulanit
     [not found]           ` <519B76CB.1000208-5C7GfCeVMHo@public.gmane.org>
2013-05-21 13:52             ` Peter Zijlstra
2013-05-21 13:52               ` Peter Zijlstra
     [not found]               ` <20130521135231.GK26912-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2013-05-21 14:25                 ` Joerg Roedel
2013-05-21 14:25                   ` Joerg Roedel
     [not found]                   ` <20130521142523.GD7424-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>
2013-05-21 15:36                     ` Peter Zijlstra
2013-05-21 15:36                       ` Peter Zijlstra
2013-05-27 16:30                   ` Peter Zijlstra
     [not found]                     ` <20130527163023.GA19373-ndre7Fmf5hadTX5a5knrm8zTDFooKrT+cvkQGrU6aU0@public.gmane.org>
2013-05-27 17:26                       ` Joerg Roedel
2013-05-27 17:26                         ` Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=51A4E6A8.7080004@amd.com \
    --to=suravee.suthikulpanit-5c7gfcevmho@public.gmane.org \
    --cc=a.p.zijlstra-/NLkJaSkS4VmR6Xm/wNWPw@public.gmane.org \
    --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
    --cc=joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org \
    --cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.