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From: Stepan Moskovchenko <stepanm@codeaurora.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org,
	Russell King <linux@arm.linux.org.uk>,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	David Brown <davidb@codeaurora.org>,
	Bryan Huntsman <bryanh@codeaurora.org>,
	Daniel Walker <dwalker@fifo99.com>
Subject: Re: [PATCH] arm: Prevent memory aliasing on non-LPAE kernels
Date: Fri, 31 May 2013 18:30:52 -0700	[thread overview]
Message-ID: <51A94ECC.5090303@codeaurora.org> (raw)
In-Reply-To: <3054064.aJsgTxiNUL@wuerfel>

On 5/30/2013 3:24 PM, Arnd Bergmann wrote:
>> +       if (size > ((phys_addr_t)~0))
>> +               size = ((phys_addr_t)~0);
>> +
>> +       /* arm_add_memory() already checks for the case of base + size > 4GB */
>> +#endif
>>          arm_add_memory(base, size);
>>   }
>
> This looks wrong for the case where 'base' is between >0 and 4GB and 'size'
> makes it spill over the 4GB boundary. You need to set
> 'size = (phys_addr_t)~0 - base' then.
>

Ah. I believe arm_add_memory() already has the logic to handle this 
case. Here, we are just trying to shrink 'size' to fit into phys_addr_t, 
since it is currently u64 but arm_add_memory() uses phys_addr_t for its 
arguments. I did not want to have this logic in two places, but I can do 
what you said if you like.


-- 
  The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
  hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: stepanm@codeaurora.org (Stepan Moskovchenko)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm: Prevent memory aliasing on non-LPAE kernels
Date: Fri, 31 May 2013 18:30:52 -0700	[thread overview]
Message-ID: <51A94ECC.5090303@codeaurora.org> (raw)
In-Reply-To: <3054064.aJsgTxiNUL@wuerfel>

On 5/30/2013 3:24 PM, Arnd Bergmann wrote:
>> +       if (size > ((phys_addr_t)~0))
>> +               size = ((phys_addr_t)~0);
>> +
>> +       /* arm_add_memory() already checks for the case of base + size > 4GB */
>> +#endif
>>          arm_add_memory(base, size);
>>   }
>
> This looks wrong for the case where 'base' is between >0 and 4GB and 'size'
> makes it spill over the 4GB boundary. You need to set
> 'size = (phys_addr_t)~0 - base' then.
>

Ah. I believe arm_add_memory() already has the logic to handle this 
case. Here, we are just trying to shrink 'size' to fit into phys_addr_t, 
since it is currently u64 but arm_add_memory() uses phys_addr_t for its 
arguments. I did not want to have this logic in two places, but I can do 
what you said if you like.


-- 
  The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
  hosted by The Linux Foundation

  reply	other threads:[~2013-06-01  1:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-30 21:45 [PATCH] arm: Prevent memory aliasing on non-LPAE kernels Stepan Moskovchenko
2013-05-30 21:45 ` Stepan Moskovchenko
2013-05-30 21:45 ` Stepan Moskovchenko
2013-05-30 22:10 ` Jason Gunthorpe
2013-05-30 22:10   ` Jason Gunthorpe
2013-05-30 22:24 ` Arnd Bergmann
2013-05-30 22:24   ` Arnd Bergmann
2013-06-01  1:30   ` Stepan Moskovchenko [this message]
2013-06-01  1:30     ` Stepan Moskovchenko
2013-06-10  5:24 ` Magnus Damm
2013-06-10  5:24   ` Magnus Damm
2013-08-29  7:08 ` takashi.yoshii.zj
2013-08-29  7:08   ` takashi.yoshii.zj at renesas.com

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