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From: "Andreas Färber" <afaerber@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	Anthony Liguori <aliguori@us.ibm.com>, kvm <kvm@vger.kernel.org>,
	Gleb Natapov <gleb@redhat.com>, Riku Voipio <riku.voipio@iki.fi>,
	Alexander Graf <agraf@suse.de>,
	Luiz Capitulino <lcapitulino@redhat.com>,
	qemu-ppc <qemu-ppc@nongnu.org>,
	Paul Brook <paul@codesourcery.com>,
	Scott Wood <scottwood@freescale.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list
Date: Wed, 21 Aug 2013 18:32:54 +0200	[thread overview]
Message-ID: <5214EBB6.7040702@suse.de> (raw)
In-Reply-To: <CAFEAcA9KXyJHzj8KucZVHzAvKuFxjMQWXguBe8p4z=3XMM_Veg@mail.gmail.com>

Am 21.08.2013 16:36, schrieb Peter Maydell:
> On 21 August 2013 15:12, Andreas Färber <afaerber@suse.de> wrote:
> 
>> -    for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
>> cpu->next_cpu) {
>> +    i = 0;
>> +    CPU_FOREACH(cpu) {
>>          DeviceState *cpudev = DEVICE(cpu);
>>          int ppibase = s->num_irq - 32 + i * 32;
>> +
>> +        if (i < s->num_cpu) {
>> +            break;
>> +        }
>> +
>>          /* physical timer; we wire it up to the non-secure timer's ID,
>>           * since a real A15 always has TrustZone but QEMU doesn't.
>>           */
>> @@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
>>          /* virtual timer */
>>          qdev_connect_gpio_out(cpudev, 1,
>>                                qdev_get_gpio_in(s->gic, ppibase + 27));
>> +        i++;
>>      }
> 
> It seems a bit ugly to have to both enumerate the CPUs
> via CPU_FOREACH and update an index i simultaneously.

Same for the original code. :)

> Isn't there any way to either say "give me the CPU pointer for
> CPU i" or "give me the index i of this CPU" ?

There is:

diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 9d0e27e..1263b12 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
     SysBusDevice *busdev;
     const char *gictype = "arm_gic";
     int i;
-    CPUState *cpu;

     if (kvm_irqchip_in_kernel()) {
         gictype = "kvm-arm-gic";
@@ -72,15 +71,10 @@ static int a15mp_priv_init(SysBusDevice *dev)
     /* Wire the outputs from each CPU's generic timer to the
      * appropriate GIC PPI inputs
      */
-    i = 0;
-    CPU_FOREACH(cpu) {
-        DeviceState *cpudev = DEVICE(cpu);
+    for (i = 0; i < s->num_cpu; i++) {
+        DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
         int ppibase = s->num_irq - 32 + i * 32;

-        if (i < s->num_cpu) {
-            break;
-        }
-
         /* physical timer; we wire it up to the non-secure timer's ID,
          * since a real A15 always has TrustZone but QEMU doesn't.
          */
@@ -89,7 +83,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
         /* virtual timer */
         qdev_connect_gpio_out(cpudev, 1,
                               qdev_get_gpio_in(s->gic, ppibase + 27));
-        i++;
     }

     /* Memory map (addresses are offsets from PERIPHBASE):


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

WARNING: multiple messages have this Message-ID (diff)
From: "Andreas Färber" <afaerber@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Anthony Liguori <aliguori@us.ibm.com>,
	Gleb Natapov <gleb@redhat.com>, kvm <kvm@vger.kernel.org>,
	Riku Voipio <riku.voipio@iki.fi>, Alexander Graf <agraf@suse.de>,
	QEMU Developers <qemu-devel@nongnu.org>,
	qemu-ppc <qemu-ppc@nongnu.org>,
	Paul Brook <paul@codesourcery.com>,
	Scott Wood <scottwood@freescale.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Luiz Capitulino <lcapitulino@redhat.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list
Date: Wed, 21 Aug 2013 18:32:54 +0200	[thread overview]
Message-ID: <5214EBB6.7040702@suse.de> (raw)
In-Reply-To: <CAFEAcA9KXyJHzj8KucZVHzAvKuFxjMQWXguBe8p4z=3XMM_Veg@mail.gmail.com>

Am 21.08.2013 16:36, schrieb Peter Maydell:
> On 21 August 2013 15:12, Andreas Färber <afaerber@suse.de> wrote:
> 
>> -    for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
>> cpu->next_cpu) {
>> +    i = 0;
>> +    CPU_FOREACH(cpu) {
>>          DeviceState *cpudev = DEVICE(cpu);
>>          int ppibase = s->num_irq - 32 + i * 32;
>> +
>> +        if (i < s->num_cpu) {
>> +            break;
>> +        }
>> +
>>          /* physical timer; we wire it up to the non-secure timer's ID,
>>           * since a real A15 always has TrustZone but QEMU doesn't.
>>           */
>> @@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
>>          /* virtual timer */
>>          qdev_connect_gpio_out(cpudev, 1,
>>                                qdev_get_gpio_in(s->gic, ppibase + 27));
>> +        i++;
>>      }
> 
> It seems a bit ugly to have to both enumerate the CPUs
> via CPU_FOREACH and update an index i simultaneously.

Same for the original code. :)

> Isn't there any way to either say "give me the CPU pointer for
> CPU i" or "give me the index i of this CPU" ?

There is:

diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 9d0e27e..1263b12 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
     SysBusDevice *busdev;
     const char *gictype = "arm_gic";
     int i;
-    CPUState *cpu;

     if (kvm_irqchip_in_kernel()) {
         gictype = "kvm-arm-gic";
@@ -72,15 +71,10 @@ static int a15mp_priv_init(SysBusDevice *dev)
     /* Wire the outputs from each CPU's generic timer to the
      * appropriate GIC PPI inputs
      */
-    i = 0;
-    CPU_FOREACH(cpu) {
-        DeviceState *cpudev = DEVICE(cpu);
+    for (i = 0; i < s->num_cpu; i++) {
+        DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
         int ppibase = s->num_irq - 32 + i * 32;

-        if (i < s->num_cpu) {
-            break;
-        }
-
         /* physical timer; we wire it up to the non-secure timer's ID,
          * since a real A15 always has TrustZone but QEMU doesn't.
          */
@@ -89,7 +83,6 @@ static int a15mp_priv_init(SysBusDevice *dev)
         /* virtual timer */
         qdev_connect_gpio_out(cpudev, 1,
                               qdev_get_gpio_in(s->gic, ppibase + 27));
-        i++;
     }

     /* Memory map (addresses are offsets from PERIPHBASE):


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2013-08-21 16:32 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-30 16:55 [Qemu-devel] [PATCH qom-cpu for-next 0/2] QOM CPUState, part 12: CPU loops, revisited Andreas Färber
2013-07-30 16:55 ` [PATCH qom-cpu for-next 1/2] cpu: Use QTAILQ for CPU list Andreas Färber
2013-07-30 16:55   ` [Qemu-devel] " Andreas Färber
2013-08-21 14:12   ` Andreas Färber
2013-08-21 14:12     ` Andreas Färber
2013-08-21 14:36     ` Peter Maydell
2013-08-21 14:36       ` Peter Maydell
2013-08-21 16:32       ` Andreas Färber [this message]
2013-08-21 16:32         ` Andreas Färber
2013-07-30 16:55 ` [Qemu-devel] [RFC qom-cpu for-next 2/2] cpu: Replace qemu_for_each_cpu() Andreas Färber
2013-07-30 18:30   ` Michael S. Tsirkin
2013-08-14 11:49 ` [Qemu-devel] [PATCH qom-cpu for-next 0/2] QOM CPUState, part 12: CPU loops, revisited Andreas Färber
2013-08-30 14:42   ` Andreas Färber

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