* [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests
@ 2013-08-29 17:28 Julien Grall
2013-09-03 15:56 ` Ian Campbell
0 siblings, 1 reply; 3+ messages in thread
From: Julien Grall @ 2013-08-29 17:28 UTC (permalink / raw)
To: xen-devel; +Cc: patches, ian.campbell, Julien Grall, stefano.stabellini
The ACTLR register is implementation defined. The SMP bit is CA15 and CA7
specific. Also replace ACTLR_CA15_SMP by ACTLR_V7_SMP.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
---
xen/arch/arm/domain.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index cb0424d..00f2d14 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -470,11 +470,19 @@ int vcpu_initialise(struct vcpu *v)
v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
- /* XXX: Handle other than CA15 cpus */
- if ( v->domain->max_vcpus > 1 )
- v->arch.actlr |= ACTLR_CA15_SMP;
- else
- v->arch.actlr &= ~ACTLR_CA15_SMP;
+ if ( is_pv32_domain(v->domain) )
+ {
+ /*
+ * ACTLR is implementation defined. For CA7 and CA15, the SMP
+ * is always at the same position.
+ * Enable SMP bit if the domain has more than 1 VCPU
+ * TODO: Handle others CPUs (ie non CA7 and CA15)
+ */
+ if ( v->domain->max_vcpus > 1 )
+ v->arch.actlr |= ACTLR_V7_SMP;
+ else
+ v->arch.actlr &= ~ACTLR_V7_SMP;
+ }
if ( (rc = vcpu_vgic_init(v)) != 0 )
return rc;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests
2013-08-29 17:28 [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests Julien Grall
@ 2013-09-03 15:56 ` Ian Campbell
2013-09-04 13:37 ` Julien Grall
0 siblings, 1 reply; 3+ messages in thread
From: Ian Campbell @ 2013-09-03 15:56 UTC (permalink / raw)
To: Julien Grall; +Cc: stefano.stabellini, patches, xen-devel
On Thu, 2013-08-29 at 18:28 +0100, Julien Grall wrote:
> The ACTLR register is implementation defined. The SMP bit is CA15 and CA7
> specific. Also replace ACTLR_CA15_SMP by ACTLR_V7_SMP.
>
> Signed-off-by: Julien Grall <julien.grall@linaro.org>
I'm afraid this breaks the arm64 build:
domain.c: In function 'vcpu_initialise':
domain.c:482:30: error: 'ACTLR_V7_SMP' undeclared (first use in this function)
domain.c:482:30: note: each undeclared identifier is reported only once for eac
h function it appears in
I'm not sure it is worth putting *that* much effort into a CA15/CA7
kernel as a 32-bit guest on a 64-bit processor, at least not right now.
The interesting use case of this support is really a 32-bit kernel which
is aware that it is running in AArch32 EL1 on a 64-bit processor (i.e.
knows about the 64-bit processors implementation specific stuff)
How about moving this into a proc info hook, or just ifdeffing it for
32-bit?
> ---
> xen/arch/arm/domain.c | 18 +++++++++++++-----
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index cb0424d..00f2d14 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -470,11 +470,19 @@ int vcpu_initialise(struct vcpu *v)
>
> v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
>
> - /* XXX: Handle other than CA15 cpus */
> - if ( v->domain->max_vcpus > 1 )
> - v->arch.actlr |= ACTLR_CA15_SMP;
> - else
> - v->arch.actlr &= ~ACTLR_CA15_SMP;
> + if ( is_pv32_domain(v->domain) )
> + {
> + /*
> + * ACTLR is implementation defined. For CA7 and CA15, the SMP
> + * is always at the same position.
> + * Enable SMP bit if the domain has more than 1 VCPU
> + * TODO: Handle others CPUs (ie non CA7 and CA15)
> + */
> + if ( v->domain->max_vcpus > 1 )
> + v->arch.actlr |= ACTLR_V7_SMP;
> + else
> + v->arch.actlr &= ~ACTLR_V7_SMP;
> + }
>
> if ( (rc = vcpu_vgic_init(v)) != 0 )
> return rc;
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests
2013-09-03 15:56 ` Ian Campbell
@ 2013-09-04 13:37 ` Julien Grall
0 siblings, 0 replies; 3+ messages in thread
From: Julien Grall @ 2013-09-04 13:37 UTC (permalink / raw)
To: Ian Campbell; +Cc: stefano.stabellini, patches, xen-devel
On 09/03/2013 04:56 PM, Ian Campbell wrote:
> On Thu, 2013-08-29 at 18:28 +0100, Julien Grall wrote:
>> The ACTLR register is implementation defined. The SMP bit is CA15 and CA7
>> specific. Also replace ACTLR_CA15_SMP by ACTLR_V7_SMP.
>>
>> Signed-off-by: Julien Grall <julien.grall@linaro.org>
>
> I'm afraid this breaks the arm64 build:
> domain.c: In function 'vcpu_initialise':
> domain.c:482:30: error: 'ACTLR_V7_SMP' undeclared (first use in this function)
> domain.c:482:30: note: each undeclared identifier is reported only once for eac
> h function it appears in
>
> I'm not sure it is worth putting *that* much effort into a CA15/CA7
> kernel as a 32-bit guest on a 64-bit processor, at least not right now.
> The interesting use case of this support is really a 32-bit kernel which
> is aware that it is running in AArch32 EL1 on a 64-bit processor (i.e.
> knows about the 64-bit processors implementation specific stuff)
>
> How about moving this into a proc info hook, or just ifdeffing it for
> 32-bit?
The first solution sounds better. I will rewrite the patch to add a proc
info hook.
--
Julien Grall
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-09-04 13:37 UTC | newest]
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2013-08-29 17:28 [PATCH] xen/arm: Don't set the ACTLR SMP bit for 64 bit guests Julien Grall
2013-09-03 15:56 ` Ian Campbell
2013-09-04 13:37 ` Julien Grall
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