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From: Heiko Stuebner <heiko@sntech.de>
To: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Sebastian Reichel <sre@kernel.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
	Michal Tomek <mtdev79b@gmail.com>,
	linux-phy@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: Re: [PATCH 2/3] phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits
Date: Thu, 04 Apr 2024 21:26:48 +0200	[thread overview]
Message-ID: <5232346.31r3eYUQgx@phil> (raw)
In-Reply-To: <20240404-rk3588-pcie-bifurcation-fixes-v1-2-9907136eeafd@kernel.org>

Am Donnerstag, 4. April 2024, 19:11:27 CEST schrieb Sebastian Reichel:
> From: Sebastian Reichel <sebastian.reichel@collabora.com>
> 
> Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but
> does not clear them because of an incorrect write mask. This fixes up
> the issue by using a newly introduced constant for the write mask.
> 
> While at it also introduces a proper GENMASK based constant for the
> PCIE30_PHY_MODE.
> 
> Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3")
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

after checking with the soc manual

Reviewed-by: Heiko Stuebner <heiko@sntech.de>



-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Sebastian Reichel <sre@kernel.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
	Michal Tomek <mtdev79b@gmail.com>,
	linux-phy@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: Re: [PATCH 2/3] phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits
Date: Thu, 04 Apr 2024 21:26:48 +0200	[thread overview]
Message-ID: <5232346.31r3eYUQgx@phil> (raw)
In-Reply-To: <20240404-rk3588-pcie-bifurcation-fixes-v1-2-9907136eeafd@kernel.org>

Am Donnerstag, 4. April 2024, 19:11:27 CEST schrieb Sebastian Reichel:
> From: Sebastian Reichel <sebastian.reichel@collabora.com>
> 
> Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but
> does not clear them because of an incorrect write mask. This fixes up
> the issue by using a newly introduced constant for the write mask.
> 
> While at it also introduces a proper GENMASK based constant for the
> PCIE30_PHY_MODE.
> 
> Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3")
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

after checking with the soc manual

Reviewed-by: Heiko Stuebner <heiko@sntech.de>



_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Vinod Koul <vkoul@kernel.org>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Sebastian Reichel <sre@kernel.org>
Cc: Shawn Lin <shawn.lin@rock-chips.com>,
	Michal Tomek <mtdev79b@gmail.com>,
	linux-phy@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
	Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: Re: [PATCH 2/3] phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits
Date: Thu, 04 Apr 2024 21:26:48 +0200	[thread overview]
Message-ID: <5232346.31r3eYUQgx@phil> (raw)
In-Reply-To: <20240404-rk3588-pcie-bifurcation-fixes-v1-2-9907136eeafd@kernel.org>

Am Donnerstag, 4. April 2024, 19:11:27 CEST schrieb Sebastian Reichel:
> From: Sebastian Reichel <sebastian.reichel@collabora.com>
> 
> Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but
> does not clear them because of an incorrect write mask. This fixes up
> the issue by using a newly introduced constant for the write mask.
> 
> While at it also introduces a proper GENMASK based constant for the
> PCIE30_PHY_MODE.
> 
> Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3")
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>

after checking with the soc manual

Reviewed-by: Heiko Stuebner <heiko@sntech.de>



  reply	other threads:[~2024-04-04 19:27 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-04 17:11 [PATCH 0/3] RK3588 PCIe bifurcation fixes Sebastian Reichel
2024-04-04 17:11 ` Sebastian Reichel
2024-04-04 17:11 ` Sebastian Reichel
2024-04-04 17:11 ` [PATCH 1/3] phy: rockchip-snps-pcie3: fix bifurcation on rk3588 Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 19:38   ` Heiko Stuebner
2024-04-04 19:38     ` Heiko Stuebner
2024-04-04 19:38     ` Heiko Stuebner
2024-04-04 17:11 ` [PATCH 2/3] phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 19:26   ` Heiko Stuebner [this message]
2024-04-04 19:26     ` Heiko Stuebner
2024-04-04 19:26     ` Heiko Stuebner
2024-04-04 17:11 ` [PATCH 3/3] phy: rockchip: naneng-combphy: Fix mux on rk3588 Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 17:11   ` Sebastian Reichel
2024-04-04 19:30   ` Heiko Stuebner
2024-04-04 19:30     ` Heiko Stuebner
2024-04-04 19:30     ` Heiko Stuebner
2024-04-06  9:18 ` [PATCH 0/3] RK3588 PCIe bifurcation fixes Vinod Koul
2024-04-06  9:18   ` Vinod Koul
2024-04-06  9:18   ` Vinod Koul

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