From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Tony Lindgren <tony@atomide.com>, Archit Taneja <archit@ti.com>
Subject: Re: [PATCH 3/3] ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers
Date: Wed, 9 Oct 2013 16:33:43 +0300 [thread overview]
Message-ID: <52555B37.80407@ti.com> (raw)
In-Reply-To: <525558AA.9050906@ti.com>
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On 09/10/13 16:22, Tero Kristo wrote:
> On 10/09/2013 04:12 PM, Tomi Valkeinen wrote:
>> dpll4_m3_ck and dpll4_m4_ck have divider bit fields which are 6 bits
>> wide. However, only values from 1 to 32 are allowed. This means we have
>> to add a divider tables and list the dividers explicitly.
>>
>> I believe the same issue is there for other dpll4_mx_ck clocks, but as
>> I'm not familiar with them, I didn't touch them.
>
> I think you can limit the max value with a mask only, no need to define
> new tables.
The bit field is 6 bits wide, so the mask is correct. It's just that the
biggest allowed value is 32, which takes 6 bits, not 63.
Changing the mask to 5 bits would limit the divider to 31, wouldn't it?
Tomi
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From: tomi.valkeinen@ti.com (Tomi Valkeinen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers
Date: Wed, 9 Oct 2013 16:33:43 +0300 [thread overview]
Message-ID: <52555B37.80407@ti.com> (raw)
In-Reply-To: <525558AA.9050906@ti.com>
On 09/10/13 16:22, Tero Kristo wrote:
> On 10/09/2013 04:12 PM, Tomi Valkeinen wrote:
>> dpll4_m3_ck and dpll4_m4_ck have divider bit fields which are 6 bits
>> wide. However, only values from 1 to 32 are allowed. This means we have
>> to add a divider tables and list the dividers explicitly.
>>
>> I believe the same issue is there for other dpll4_mx_ck clocks, but as
>> I'm not familiar with them, I didn't touch them.
>
> I think you can limit the max value with a mask only, no need to define
> new tables.
The bit field is 6 bits wide, so the mask is correct. It's just that the
biggest allowed value is 32, which takes 6 bits, not 63.
Changing the mask to 5 bits would limit the divider to 31, wouldn't it?
Tomi
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next prev parent reply other threads:[~2013-10-09 13:34 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-09 13:12 [PATCH 1/3] ARM: OMAP4: use CLK_SET_RATE_PARENT for dss_dss_clk Tomi Valkeinen
2013-10-09 13:12 ` Tomi Valkeinen
2013-10-09 13:12 ` [PATCH 2/3] ARM: OMAP3: use CLK_SET_RATE_PARENT for dss clocks Tomi Valkeinen
2013-10-09 13:12 ` Tomi Valkeinen
2013-10-24 15:13 ` Paul Walmsley
2013-10-24 15:13 ` Paul Walmsley
2013-10-09 13:12 ` [PATCH 3/3] ARM: OMAP3: fix dpll4_m3_ck and dpll4_m4_ck dividers Tomi Valkeinen
2013-10-09 13:12 ` Tomi Valkeinen
2013-10-09 13:22 ` Tero Kristo
2013-10-09 13:22 ` Tero Kristo
2013-10-09 13:33 ` Tomi Valkeinen [this message]
2013-10-09 13:33 ` Tomi Valkeinen
2013-10-09 13:43 ` Tero Kristo
2013-10-09 13:43 ` Tero Kristo
2013-10-24 15:14 ` Paul Walmsley
2013-10-24 15:14 ` Paul Walmsley
2013-10-09 13:22 ` [PATCH 1/3] ARM: OMAP4: use CLK_SET_RATE_PARENT for dss_dss_clk Tero Kristo
2013-10-09 13:22 ` Tero Kristo
2013-10-09 13:39 ` Tomi Valkeinen
2013-10-09 13:39 ` Tomi Valkeinen
2013-10-24 8:03 ` Tomi Valkeinen
2013-10-24 8:03 ` Tomi Valkeinen
2013-10-24 13:23 ` Tero Kristo
2013-10-24 13:23 ` Tero Kristo
2013-10-24 13:28 ` Tony Lindgren
2013-10-24 13:28 ` Tony Lindgren
2013-10-24 13:31 ` Tero Kristo
2013-10-24 13:31 ` Tero Kristo
2013-10-24 13:42 ` Tony Lindgren
2013-10-24 13:42 ` Tony Lindgren
2013-10-24 15:13 ` Paul Walmsley
2013-10-24 15:13 ` Paul Walmsley
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