* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-11-22 16:08 ` ludovic.desroches at atmel.com
0 siblings, 0 replies; 10+ messages in thread
From: ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w @ 2013-11-22 16:08 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w,
plagnioj-sclMFOaUSTBWk0Htik3J/w, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
Ludovic Desroches
From: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
With some devices, transfer hangs during I2C frame transmission. This issue
disappears when reducing the internal frequency of the TWI IP. Even if it is
indicated that internal clock max frequency is 66MHz, it seems we have
oversampling on I2C signals making TWI believe that a transfer in progress
is done.
This fix has no impact on the I2C bus frequency.
Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> #3.10+
Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
---
v2: update commit message
arch/arm/mach-at91/sama5d3.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 4012797..4ee0de5 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
.name = "twi0_clk",
.pid = SAMA5D3_ID_TWI0,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk twi1_clk = {
.name = "twi1_clk",
.pid = SAMA5D3_ID_TWI1,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk twi2_clk = {
.name = "twi2_clk",
.pid = SAMA5D3_ID_TWI2,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk mmc0_clk = {
.name = "mci0_clk",
--
1.7.9.5
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-11-22 16:08 ` ludovic.desroches at atmel.com
0 siblings, 0 replies; 10+ messages in thread
From: ludovic.desroches at atmel.com @ 2013-11-22 16:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Ludovic Desroches <ludovic.desroches@atmel.com>
With some devices, transfer hangs during I2C frame transmission. This issue
disappears when reducing the internal frequency of the TWI IP. Even if it is
indicated that internal clock max frequency is 66MHz, it seems we have
oversampling on I2C signals making TWI believe that a transfer in progress
is done.
This fix has no impact on the I2C bus frequency.
Cc: <stable@vger.kernel.org> #3.10+
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
---
v2: update commit message
arch/arm/mach-at91/sama5d3.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 4012797..4ee0de5 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
.name = "twi0_clk",
.pid = SAMA5D3_ID_TWI0,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk twi1_clk = {
.name = "twi1_clk",
.pid = SAMA5D3_ID_TWI1,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk twi2_clk = {
.name = "twi2_clk",
.pid = SAMA5D3_ID_TWI2,
.type = CLK_TYPE_PERIPHERAL,
- .div = AT91_PMC_PCR_DIV2,
+ .div = AT91_PMC_PCR_DIV8,
};
static struct clk mmc0_clk = {
.name = "mci0_clk",
--
1.7.9.5
^ permalink raw reply related [flat|nested] 10+ messages in thread[parent not found: <1385136523-11962-1-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
2013-11-22 16:08 ` ludovic.desroches at atmel.com
@ 2013-11-22 16:25 ` Wolfram Sang
-1 siblings, 0 replies; 10+ messages in thread
From: Wolfram Sang @ 2013-11-22 16:25 UTC (permalink / raw)
To: ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w,
plagnioj-sclMFOaUSTBWk0Htik3J/w, linux-i2c-u79uwXL29TY76Z2rM5mHXA
[-- Attachment #1: Type: text/plain, Size: 898 bytes --]
On Fri, Nov 22, 2013 at 05:08:43PM +0100, ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org wrote:
> From: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Acked-by: Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-11-22 16:25 ` Wolfram Sang
0 siblings, 0 replies; 10+ messages in thread
From: Wolfram Sang @ 2013-11-22 16:25 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Nov 22, 2013 at 05:08:43PM +0100, ludovic.desroches at atmel.com wrote:
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable@vger.kernel.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
2013-11-22 16:08 ` ludovic.desroches at atmel.com
@ 2013-12-02 8:42 ` Nicolas Ferre
-1 siblings, 0 replies; 10+ messages in thread
From: Nicolas Ferre @ 2013-12-02 8:42 UTC (permalink / raw)
To: ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: plagnioj-sclMFOaUSTBWk0Htik3J/w, linux-i2c-u79uwXL29TY76Z2rM5mHXA
On 22/11/2013 17:08, ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org :
> From: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
added to at91-3.14-dt branch.
thanks,
> ---
>
> v2: update commit message
>
> arch/arm/mach-at91/sama5d3.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index 4012797..4ee0de5 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
> .name = "twi0_clk",
> .pid = SAMA5D3_ID_TWI0,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi1_clk = {
> .name = "twi1_clk",
> .pid = SAMA5D3_ID_TWI1,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi2_clk = {
> .name = "twi2_clk",
> .pid = SAMA5D3_ID_TWI2,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk mmc0_clk = {
> .name = "mci0_clk",
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-12-02 8:42 ` Nicolas Ferre
0 siblings, 0 replies; 10+ messages in thread
From: Nicolas Ferre @ 2013-12-02 8:42 UTC (permalink / raw)
To: linux-arm-kernel
On 22/11/2013 17:08, ludovic.desroches at atmel.com :
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable@vger.kernel.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
added to at91-3.14-dt branch.
thanks,
> ---
>
> v2: update commit message
>
> arch/arm/mach-at91/sama5d3.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index 4012797..4ee0de5 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
> .name = "twi0_clk",
> .pid = SAMA5D3_ID_TWI0,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi1_clk = {
> .name = "twi1_clk",
> .pid = SAMA5D3_ID_TWI1,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi2_clk = {
> .name = "twi2_clk",
> .pid = SAMA5D3_ID_TWI2,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk mmc0_clk = {
> .name = "mci0_clk",
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 10+ messages in thread[parent not found: <529C47E3.2010508-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
2013-12-02 8:42 ` Nicolas Ferre
@ 2013-12-02 10:56 ` Nicolas Ferre
-1 siblings, 0 replies; 10+ messages in thread
From: Nicolas Ferre @ 2013-12-02 10:56 UTC (permalink / raw)
To: ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: plagnioj-sclMFOaUSTBWk0Htik3J/w, linux-i2c-u79uwXL29TY76Z2rM5mHXA
On 02/12/2013 09:42, Nicolas Ferre :
> On 22/11/2013 17:08, ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org :
>> From: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>>
>> With some devices, transfer hangs during I2C frame transmission. This issue
>> disappears when reducing the internal frequency of the TWI IP. Even if it is
>> indicated that internal clock max frequency is 66MHz, it seems we have
>> oversampling on I2C signals making TWI believe that a transfer in progress
>> is done.
>>
>> This fix has no impact on the I2C bus frequency.
>>
>> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> #3.10+
>> Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>> Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>
> added to at91-3.14-dt branch.
No, sorry, it will go in at91-3.13-fixes!
Bye,
>> ---
>>
>> v2: update commit message
>>
>> arch/arm/mach-at91/sama5d3.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
>> index 4012797..4ee0de5 100644
>> --- a/arch/arm/mach-at91/sama5d3.c
>> +++ b/arch/arm/mach-at91/sama5d3.c
>> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
>> .name = "twi0_clk",
>> .pid = SAMA5D3_ID_TWI0,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk twi1_clk = {
>> .name = "twi1_clk",
>> .pid = SAMA5D3_ID_TWI1,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk twi2_clk = {
>> .name = "twi2_clk",
>> .pid = SAMA5D3_ID_TWI2,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk mmc0_clk = {
>> .name = "mci0_clk",
>>
>
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-12-02 10:56 ` Nicolas Ferre
0 siblings, 0 replies; 10+ messages in thread
From: Nicolas Ferre @ 2013-12-02 10:56 UTC (permalink / raw)
To: linux-arm-kernel
On 02/12/2013 09:42, Nicolas Ferre :
> On 22/11/2013 17:08, ludovic.desroches at atmel.com :
>> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>>
>> With some devices, transfer hangs during I2C frame transmission. This issue
>> disappears when reducing the internal frequency of the TWI IP. Even if it is
>> indicated that internal clock max frequency is 66MHz, it seems we have
>> oversampling on I2C signals making TWI believe that a transfer in progress
>> is done.
>>
>> This fix has no impact on the I2C bus frequency.
>>
>> Cc: <stable@vger.kernel.org> #3.10+
>> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> added to at91-3.14-dt branch.
No, sorry, it will go in at91-3.13-fixes!
Bye,
>> ---
>>
>> v2: update commit message
>>
>> arch/arm/mach-at91/sama5d3.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
>> index 4012797..4ee0de5 100644
>> --- a/arch/arm/mach-at91/sama5d3.c
>> +++ b/arch/arm/mach-at91/sama5d3.c
>> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
>> .name = "twi0_clk",
>> .pid = SAMA5D3_ID_TWI0,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk twi1_clk = {
>> .name = "twi1_clk",
>> .pid = SAMA5D3_ID_TWI1,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk twi2_clk = {
>> .name = "twi2_clk",
>> .pid = SAMA5D3_ID_TWI2,
>> .type = CLK_TYPE_PERIPHERAL,
>> - .div = AT91_PMC_PCR_DIV2,
>> + .div = AT91_PMC_PCR_DIV8,
>> };
>> static struct clk mmc0_clk = {
>> .name = "mci0_clk",
>>
>
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
2013-11-22 16:08 ` ludovic.desroches at atmel.com
@ 2013-11-22 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
-1 siblings, 0 replies; 10+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-11-22 18:31 UTC (permalink / raw)
To: ludovic.desroches; +Cc: nicolas.ferre, linux-i2c, linux-arm-kernel
On 17:08 Fri 22 Nov , ludovic.desroches@atmel.com wrote:
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
so now the IP run a 16MHz
you could also mention that now we save power too
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Best Regards,
J.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable@vger.kernel.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
> ---
>
> v2: update commit message
>
> arch/arm/mach-at91/sama5d3.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index 4012797..4ee0de5 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
> .name = "twi0_clk",
> .pid = SAMA5D3_ID_TWI0,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi1_clk = {
> .name = "twi1_clk",
> .pid = SAMA5D3_ID_TWI1,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi2_clk = {
> .name = "twi2_clk",
> .pid = SAMA5D3_ID_TWI2,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk mmc0_clk = {
> .name = "mci0_clk",
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency
@ 2013-11-22 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
0 siblings, 0 replies; 10+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2013-11-22 18:31 UTC (permalink / raw)
To: linux-arm-kernel
On 17:08 Fri 22 Nov , ludovic.desroches at atmel.com wrote:
> From: Ludovic Desroches <ludovic.desroches@atmel.com>
>
> With some devices, transfer hangs during I2C frame transmission. This issue
> disappears when reducing the internal frequency of the TWI IP. Even if it is
> indicated that internal clock max frequency is 66MHz, it seems we have
> oversampling on I2C signals making TWI believe that a transfer in progress
> is done.
so now the IP run a 16MHz
you could also mention that now we save power too
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Best Regards,
J.
>
> This fix has no impact on the I2C bus frequency.
>
> Cc: <stable@vger.kernel.org> #3.10+
> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
> ---
>
> v2: update commit message
>
> arch/arm/mach-at91/sama5d3.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
> index 4012797..4ee0de5 100644
> --- a/arch/arm/mach-at91/sama5d3.c
> +++ b/arch/arm/mach-at91/sama5d3.c
> @@ -95,19 +95,19 @@ static struct clk twi0_clk = {
> .name = "twi0_clk",
> .pid = SAMA5D3_ID_TWI0,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi1_clk = {
> .name = "twi1_clk",
> .pid = SAMA5D3_ID_TWI1,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk twi2_clk = {
> .name = "twi2_clk",
> .pid = SAMA5D3_ID_TWI2,
> .type = CLK_TYPE_PERIPHERAL,
> - .div = AT91_PMC_PCR_DIV2,
> + .div = AT91_PMC_PCR_DIV8,
> };
> static struct clk mmc0_clk = {
> .name = "mci0_clk",
> --
> 1.7.9.5
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2013-12-02 10:56 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2013-11-22 16:08 [PATCH v2] ARM: at91: sama5d3: reduce TWI internal clock frequency ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w
2013-11-22 16:08 ` ludovic.desroches at atmel.com
[not found] ` <1385136523-11962-1-git-send-email-ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2013-11-22 16:25 ` Wolfram Sang
2013-11-22 16:25 ` Wolfram Sang
2013-12-02 8:42 ` Nicolas Ferre
2013-12-02 8:42 ` Nicolas Ferre
[not found] ` <529C47E3.2010508-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2013-12-02 10:56 ` Nicolas Ferre
2013-12-02 10:56 ` Nicolas Ferre
2013-11-22 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
2013-11-22 18:31 ` Jean-Christophe PLAGNIOL-VILLARD
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