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From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH 1/6] iommu/tegra124: smmu: optionaly AHB enables SMMU
Date: Mon, 16 Dec 2013 13:37:35 -0700	[thread overview]
Message-ID: <52AF648F.70608@wwwdotorg.org> (raw)
In-Reply-To: <1386246319-17851-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

On 12/05/2013 05:25 AM, Hiroshi Doyu wrote:
> SMMU used to depend on AHB bus. AHB driver needs to be populated and
> AHB_XBAR_CTRL_SMMU_INIT_DONE bit needs to be set earliear than SMMU
> being populated. Later Tegra SoC (>= T124) doesn't need AHB to enable
> SMMU on AHB_XBAR_CTRL for AHB_XBAR_CTRL_SMMU_INIT_DONE any more. This
> setting bit is now optional, depending on DT passing ahb phandle or
> not.

This patch should happen after 1/3, and the "platform data" should
indicate whether tegra_ahb_enable_smmu() needs to be called, so that on
Tegra30...

> diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c

> @@ -1284,9 +1287,6 @@ static int tegra_smmu_probe(struct platform_device *pdev)

>  	smmu->ahb = of_parse_phandle(dev->of_node, "nvidia,ahb", 0);
> -	if (!smmu->ahb)
> -		return -ENODEV;

... that error-checking is still in place, yet on Tegra124,
of_parse_phandle() isn't even called.

  parent reply	other threads:[~2013-12-16 20:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-05 12:25 [PATCH 0/6] iommu/tegra124: smmu: add T124 enhancement Hiroshi Doyu
     [not found] ` <1386246319-17851-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-05 12:25   ` [PATCH 1/6] iommu/tegra124: smmu: optionaly AHB enables SMMU Hiroshi Doyu
     [not found]     ` <1386246319-17851-2-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 20:37       ` Stephen Warren [this message]
2013-12-05 12:25   ` [PATCH 2/6] iommu/tegra124: smmu: convert swgroup ID to asid offset Hiroshi Doyu
2013-12-05 12:25   ` [PATCH 3/6] iommu/tegra124: smmu: add support platform data Hiroshi Doyu
     [not found]     ` <1386246319-17851-4-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 20:36       ` Stephen Warren
2013-12-05 12:25   ` [PATCH 4/6] iommu/tegra124: smmu: support more than 32 bit pa Hiroshi Doyu
     [not found]     ` <1386246319-17851-5-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2014-01-07  5:25       ` Mark Zhang
     [not found]         ` <52CB8FD1.4070306-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-01-08 13:45           ` Thierry Reding
     [not found]             ` <20140108134550.GF1592-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>
2014-01-09  2:28               ` Mark Zhang
2013-12-05 12:25   ` [PATCH 5/6] iommu/tegra124: smmu: {TLB,PTC} reset value per SoC Hiroshi Doyu
     [not found]     ` <1386246319-17851-6-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-12-16 20:41       ` Stephen Warren
2013-12-05 12:25   ` [PATCH 6/6] iommu/tegra124: smmu: adjust TLB_FLUSH_ASID bit range Hiroshi Doyu
2013-12-09  7:16   ` [PATCH 7/6] iommu/tegra124: smmu: add multiple asid_security support Hiroshi Doyu

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