* [PATCH] xen: arm: context switch the aux memory attribute registers
@ 2013-12-20 15:08 Ian Campbell
2013-12-20 15:33 ` Julien Grall
0 siblings, 1 reply; 3+ messages in thread
From: Ian Campbell @ 2013-12-20 15:08 UTC (permalink / raw)
To: xen-devel; +Cc: julien.grall, tim, Ian Campbell, stefano.stabellini
We appear to have somehow missed these. Linux doesn't actually use them and
none of the processors I've looked at actually define any bits in them (so
they are UNK/SBZP) but it is good form to context switch them anyway.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/domain.c | 6 ++++++
xen/include/asm-arm/cpregs.h | 2 ++
xen/include/asm-arm/domain.h | 2 ++
3 files changed, 10 insertions(+)
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 4099e88..124cccf 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -98,8 +98,11 @@ static void ctxt_switch_from(struct vcpu *p)
#if defined(CONFIG_ARM_32)
p->arch.mair0 = READ_CP32(MAIR0);
p->arch.mair1 = READ_CP32(MAIR1);
+ p->arch.amair0 = READ_CP32(AMAIR0);
+ p->arch.amair1 = READ_CP32(AMAIR1);
#else
p->arch.mair = READ_SYSREG64(MAIR_EL1);
+ p->arch.amair = READ_SYSREG64(AMAIR_EL1);
#endif
/* Fault Status */
@@ -177,8 +180,11 @@ static void ctxt_switch_to(struct vcpu *n)
#if defined(CONFIG_ARM_32)
WRITE_CP32(n->arch.mair0, MAIR0);
WRITE_CP32(n->arch.mair1, MAIR1);
+ WRITE_CP32(n->arch.amair0, AMAIR0);
+ WRITE_CP32(n->arch.amair1, AMAIR1);
#elif defined(CONFIG_ARM_64)
WRITE_SYSREG64(n->arch.mair, MAIR_EL1);
+ WRITE_SYSREG64(n->arch.amair, AMAIR_EL1);
#endif
isb();
diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
index 29cd9d7..dcdbe47 100644
--- a/xen/include/asm-arm/cpregs.h
+++ b/xen/include/asm-arm/cpregs.h
@@ -200,6 +200,8 @@
#define MAIR1 p15,0,c10,c2,1 /* Memory Attribute Indirection Register 1 AKA NMRR */
#define HMAIR0 p15,4,c10,c2,0 /* Hyp. Memory Attribute Indirection Register 0 */
#define HMAIR1 p15,4,c10,c2,1 /* Hyp. Memory Attribute Indirection Register 1 */
+#define AMAIR0 p15,0,c10,c3,0 /* Aux. Memory Attribute Indirection Register 0 */
+#define AMAIR1 p15,0,c10,c3,1 /* Aux. Memory Attribute Indirection Register 1 */
/* CP15 CR11: DMA Operations for TCM Access */
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index e2202a6..bc20a15 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -221,8 +221,10 @@ struct arch_vcpu
uint64_t par;
#ifdef CONFIG_ARM_32
uint32_t mair0, mair1;
+ uint32_t amair0, amair1;
#else
uint64_t mair;
+ uint64_t amair;
#endif
/* Control Registers */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] xen: arm: context switch the aux memory attribute registers
2013-12-20 15:08 [PATCH] xen: arm: context switch the aux memory attribute registers Ian Campbell
@ 2013-12-20 15:33 ` Julien Grall
2014-01-07 14:35 ` Ian Campbell
0 siblings, 1 reply; 3+ messages in thread
From: Julien Grall @ 2013-12-20 15:33 UTC (permalink / raw)
To: Ian Campbell, xen-devel; +Cc: tim, stefano.stabellini
On 12/20/2013 03:08 PM, Ian Campbell wrote:
> We appear to have somehow missed these. Linux doesn't actually use them and
> none of the processors I've looked at actually define any bits in them (so
> they are UNK/SBZP) but it is good form to context switch them anyway.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
> ---
> xen/arch/arm/domain.c | 6 ++++++
> xen/include/asm-arm/cpregs.h | 2 ++
> xen/include/asm-arm/domain.h | 2 ++
> 3 files changed, 10 insertions(+)
>
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index 4099e88..124cccf 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -98,8 +98,11 @@ static void ctxt_switch_from(struct vcpu *p)
> #if defined(CONFIG_ARM_32)
> p->arch.mair0 = READ_CP32(MAIR0);
> p->arch.mair1 = READ_CP32(MAIR1);
> + p->arch.amair0 = READ_CP32(AMAIR0);
> + p->arch.amair1 = READ_CP32(AMAIR1);
> #else
> p->arch.mair = READ_SYSREG64(MAIR_EL1);
> + p->arch.amair = READ_SYSREG64(AMAIR_EL1);
> #endif
>
> /* Fault Status */
> @@ -177,8 +180,11 @@ static void ctxt_switch_to(struct vcpu *n)
> #if defined(CONFIG_ARM_32)
> WRITE_CP32(n->arch.mair0, MAIR0);
> WRITE_CP32(n->arch.mair1, MAIR1);
> + WRITE_CP32(n->arch.amair0, AMAIR0);
> + WRITE_CP32(n->arch.amair1, AMAIR1);
> #elif defined(CONFIG_ARM_64)
> WRITE_SYSREG64(n->arch.mair, MAIR_EL1);
> + WRITE_SYSREG64(n->arch.amair, AMAIR_EL1);
> #endif
> isb();
>
> diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
> index 29cd9d7..dcdbe47 100644
> --- a/xen/include/asm-arm/cpregs.h
> +++ b/xen/include/asm-arm/cpregs.h
> @@ -200,6 +200,8 @@
> #define MAIR1 p15,0,c10,c2,1 /* Memory Attribute Indirection Register 1 AKA NMRR */
> #define HMAIR0 p15,4,c10,c2,0 /* Hyp. Memory Attribute Indirection Register 0 */
> #define HMAIR1 p15,4,c10,c2,1 /* Hyp. Memory Attribute Indirection Register 1 */
> +#define AMAIR0 p15,0,c10,c3,0 /* Aux. Memory Attribute Indirection Register 0 */
> +#define AMAIR1 p15,0,c10,c3,1 /* Aux. Memory Attribute Indirection Register 1 */
>
> /* CP15 CR11: DMA Operations for TCM Access */
>
> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
> index e2202a6..bc20a15 100644
> --- a/xen/include/asm-arm/domain.h
> +++ b/xen/include/asm-arm/domain.h
> @@ -221,8 +221,10 @@ struct arch_vcpu
> uint64_t par;
> #ifdef CONFIG_ARM_32
> uint32_t mair0, mair1;
> + uint32_t amair0, amair1;
> #else
> uint64_t mair;
> + uint64_t amair;
> #endif
>
> /* Control Registers */
>
--
Julien Grall
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] xen: arm: context switch the aux memory attribute registers
2013-12-20 15:33 ` Julien Grall
@ 2014-01-07 14:35 ` Ian Campbell
0 siblings, 0 replies; 3+ messages in thread
From: Ian Campbell @ 2014-01-07 14:35 UTC (permalink / raw)
To: Julien Grall; +Cc: stefano.stabellini, tim, xen-devel
On Fri, 2013-12-20 at 15:33 +0000, Julien Grall wrote:
>
> On 12/20/2013 03:08 PM, Ian Campbell wrote:
> > We appear to have somehow missed these. Linux doesn't actually use them and
> > none of the processors I've looked at actually define any bits in them (so
> > they are UNK/SBZP) but it is good form to context switch them anyway.
> >
> > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
>
> Acked-by: Julien Grall <julien.grall@linaro.org>
I feel a bit conflicted giving a release-ack to my own patch but I think
it is low risk and will avoid hard to diagnose failures if Xen is run on
a processor which uses these.
So applied.
Ian.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2014-01-07 14:35 UTC | newest]
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2013-12-20 15:08 [PATCH] xen: arm: context switch the aux memory attribute registers Ian Campbell
2013-12-20 15:33 ` Julien Grall
2014-01-07 14:35 ` Ian Campbell
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