From: Fabien Chouteau <chouteau@adacore.com>
To: Sebastian Huber <sebastian.huber@embedded-brains.de>,
qemu-devel@nongnu.org
Cc: blauwirbel@gmail.com
Subject: Re: [Qemu-devel] [PATCH v2] SPARC: Add and use CPU_FEATURE_CASA
Date: Thu, 13 Feb 2014 13:01:24 +0100 [thread overview]
Message-ID: <52FCB414.2050306@adacore.com> (raw)
In-Reply-To: <1392285137-10598-1-git-send-email-sebastian.huber@embedded-brains.de>
On 02/13/2014 10:52 AM, Sebastian Huber wrote:
> The LEON3 processor has support for the CASA instruction which is
> normally only available for SPARC V9 processors. Binutils 2.24
> and GCC 4.9 will support this instruction for LEON3. GCC uses it to
> generate C11 atomic operations.
>
> The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC64 is
> not defined use a supervisor data load/store for an ASI of 0x80 in
> helper_ld_asi()/helper_st_asi().
>
Hello Sebastian,
If I understand correctly, the difference with V1 is that ASI 0x80. Why
did you chose Supervisor data access against User data access? (I cannot
find documentation about 0x80 ASI)
Thanks,
next prev parent reply other threads:[~2014-02-13 12:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-13 9:52 [Qemu-devel] [PATCH v2] SPARC: Add and use CPU_FEATURE_CASA Sebastian Huber
2014-02-13 12:01 ` Fabien Chouteau [this message]
2014-02-13 13:00 ` Sebastian Huber
2014-02-13 14:55 ` Fabien Chouteau
2014-02-13 15:50 ` Fabien Chouteau
2014-02-14 8:41 ` Sebastian Huber
2014-02-14 13:44 ` Fabien Chouteau
2014-02-14 13:55 ` Andreas Färber
-- strict thread matches above, loose matches on Subject: below --
2013-11-26 14:04 [Qemu-devel] [PATCH] " Sebastian Huber
2013-11-28 10:27 ` [Qemu-devel] [PATCH v2] " Sebastian Huber
2013-12-10 8:09 ` Sebastian Huber
2013-12-10 17:16 ` Fabien Chouteau
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