Re: [Qemu-devel] [PATCH v2] SPARC: Add and use CPU_FEATURE_CASA

[Sebastian Huber <sebastian.huber@embedded-brains.de>]

On 2014-02-13 16:50, Fabien Chouteau wrote:
> On 02/13/2014 03:55 PM, Fabien Chouteau wrote:
>> On 02/13/2014 02:00 PM, Sebastian Huber wrote:
>>> On 2014-02-13 13:01, Fabien Chouteau wrote:
>>>> On 02/13/2014 10:52 AM, Sebastian Huber wrote:
>>>>> The LEON3 processor has support for the CASA instruction which is
>>>>> normally only available for SPARC V9 processors.  Binutils 2.24
>>>>> and GCC 4.9 will support this instruction for LEON3.  GCC uses it to
>>>>> generate C11 atomic operations.
>>>>>
>>>>> The CAS synthetic instruction uses an ASI of 0x80.  If TARGET_SPARC64 is
>>>>> not defined use a supervisor data load/store for an ASI of 0x80 in
>>>>> helper_ld_asi()/helper_st_asi().
>>>>>
>>>>
>>>> Hello Sebastian,
>>>>
>>>> If I understand correctly, the difference with V1 is that ASI 0x80. Why
>>>> did you chose Supervisor data access against User data access?
>>>
>>> User data access would work also.  I don't have a preference here.
>>>
>>>> (I cannot
>>>> find documentation about 0x80 ASI)
>>>
>>> GCC will generate CAS instructions, e.g.
>>
>> ...
>>
>>> In the GNU Binutils you find:
>>>
>>> opcodes/sparc-opc.c:{ "cas",    F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, 0, v9andleon }, /* casa [rs1]ASI_P,rs2,rd */
>>>
>>> This is where the 0x80 comes from.
>>>
>>
>> In some leon3 doc I found this:
>>
>> 62.2.7 Compare and Swap instruction (CASA)
>> LEON3 implements the SPARC V9 Compare and Swap Alternative (CASA) instruction. The CASA
>> is enabled the interger load delay is set to 1 and the NOTAG generic is 0. The CASA operates as
>> described in the SPARC V9 manual. The instruction is privileged but setting ASI = 0xA (user data)
>> will allow it to be used in user mode.
>>
>> Which confirm privileged instruction. I will ask our GCC expert if they
>> know where that 0x80 ASI comes from.
>>
>
> This ASI 0x80 is really defined nowhere in Leon3 not even in the sources :)
> Maybe there's a bug in binutils... Did you try to run this program on a real board?

Yes, I tested it on a NGMP board with a LEON4 processor (documentation is the 
same for CAS as in LEON3).

The ASI 0x80 is defined in the SPARC V9 manual, Table 12—Address Space 
Identifiers (ASIs).  Here we have:

0x80, ASI_PRIMARY, Unrestricted access, Primary address space

So should I change it to use User Data Access?

-- 
Sebastian Huber, embedded brains GmbH

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