From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Blue Swirl <blauwirbel@gmail.com>, Bob Breuer <breuerr@mc.net>,
QEMU Developers <qemu-devel@nongnu.org>,
Anthony Liguori <aliguori@amazon.com>,
Artyom Tarasenko <atar4qemu@gmail.com>
Subject: Re: [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Date: Mon, 17 Feb 2014 12:33:21 +0000 [thread overview]
Message-ID: <53020191.20804@ilande.co.uk> (raw)
In-Reply-To: <CAFEAcA9mB903caNbqnbS5WxfACUcNrgjQ=coU1PApK9oofawUg@mail.gmail.com>
On 09/02/14 15:33, Peter Maydell wrote:
>> It's been a little while since I looked, however this was my interpretation
>> of the table 3-12 on p.66 of the SBus specification. While that particular
>> table refers to the acknowledgment cycle from the slave back to the master,
>> it seems to work here in the same way when transferring between the master
>> and the slave.
>
> It's not that I think your comment is wrong about how SBus does
> byte transfers, or that the code is wrong, I just don't think that the
> reason for the code is the SBus behaviour; it's the device behaviour.
> QEMU abstracts a bus's mechanisms for transferring data into the
> MemoryRegion ops, which means that for a byte access you'll
> always get called with the byte value in the low 8 bits of the input
> argument. This would be true whether SBus passed byte values in
> lines 31..28, 7..0 or by sending them one bit at a time on D13. The
> relation between a byte write and a word write here is a property
> of the device, not the bus.
>
> (You'll notice that 3-12 allows the slave to send the byte data
> in various different lanes depending on which size acknowlegement
> it chooses to send. The documentation of what the master does
> is on page 53 and actually says you have to send it in two lanes
> for a non-aligned address, and certainly QEMU won't do anything
> corresponding to that. In any case I don't think it's relevant here.)
(goes and thinks about this for a bit)
Okay I can agree with that it's more an artifact of the implementation,
rather than dependent upon the behaviour of the bus. I'll alter the
comment for the next revision which I hope to post to the list over the
next day or so.
ATB,
Mark.
next prev parent reply other threads:[~2014-02-17 12:35 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-08 16:38 [Qemu-devel] [PATCHv2 0/2] sun4m: Implement Sun CG3 framebuffer for QEMU Mark Cave-Ayland
2014-02-08 16:38 ` [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM Mark Cave-Ayland
2014-02-09 4:14 ` Peter Crosthwaite
2014-02-09 13:35 ` Mark Cave-Ayland
2014-02-14 14:54 ` Peter Crosthwaite
2014-02-17 12:50 ` Mark Cave-Ayland
2014-02-17 16:18 ` Bob Breuer
2014-02-09 14:41 ` Peter Maydell
2014-02-09 15:19 ` Mark Cave-Ayland
2014-02-09 15:33 ` Peter Maydell
2014-02-17 12:33 ` Mark Cave-Ayland [this message]
2014-02-09 15:10 ` Andreas Färber
2014-02-09 15:24 ` Mark Cave-Ayland
2014-02-09 15:39 ` Andreas Färber
2014-02-10 8:20 ` Paolo Bonzini
2014-02-17 12:43 ` Mark Cave-Ayland
2014-02-17 12:54 ` Paolo Bonzini
2014-02-08 16:38 ` [Qemu-devel] [PATCHv2 2/2] sun4m: Add Sun CG3 framebuffer initialisation function Mark Cave-Ayland
2014-02-09 15:32 ` Andreas Färber
2014-02-17 12:30 ` Mark Cave-Ayland
2014-02-19 21:23 ` Mark Cave-Ayland
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