From: Bob Breuer <breuerr@mc.net>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Blue Swirl <blauwirbel@gmail.com>,
Anthony Liguori <aliguori@amazon.com>,
Artyom Tarasenko <atar4qemu@gmail.com>
Subject: Re: [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM
Date: Mon, 17 Feb 2014 10:18:28 -0600 [thread overview]
Message-ID: <53023654.7070009@mc.net> (raw)
In-Reply-To: <53020584.9050004@ilande.co.uk>
On 2/17/2014 6:50 AM, Mark Cave-Ayland wrote:
> On 14/02/14 14:54, Peter Crosthwaite wrote:
>
>>> The short answer is "we don't know" because we don't have any
>>> documentation.
>>
>> Sigh.... This has happened quite a lot lately.
>>
>> If the kernel driver has macros, re-use them as much as possible. If
>> you have a vague idea on whats, what, a few well invented names would
>> help the device self-documentation.
>
> Okay. I now have a revised version which borrows macro names from the
> Linux and BSD drivers which I think should be more readable. I'll post
> the revised version to the list shortly.
>
>>>> Your hander switch statements stride in 4, are you only doing this for
>>>> your one exception case of that one-byte big-endian access I commented
>>>> earlier.
>>>
>>>
>>> Yes, that is correct.
>>>
>>
>> Should you trap misaligned accesses then?
>
> Over the weekend I found out that the non-BT458 accesses (addr >= 0x10)
> are done as byte accesses and so byte accesses do need to be allowed to
> these registers. My interpretation of reading the SBus documentation is
> that on real hardware the bus converts accesses for you, and so I don't
> think a trap would be suitable here. Also I've not found an image (yet)
> that attempts bad accesses in this way across my OpenBIOS ISO test suite...
When you create the memory region for the registers, try this:
.endianness = DEVICE_BIG_ENDIAN,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
},
and ignore the bottom 2 address bits for the DAC accesses.
QEMU should then break any 32-bit accesses down to the correct 8-bit
accesses.
Bob
next prev parent reply other threads:[~2014-02-17 16:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-08 16:38 [Qemu-devel] [PATCHv2 0/2] sun4m: Implement Sun CG3 framebuffer for QEMU Mark Cave-Ayland
2014-02-08 16:38 ` [Qemu-devel] [PATCHv2 1/2] sun4m: Add Sun CG3 framebuffer and corresponding OpenBIOS FCode ROM Mark Cave-Ayland
2014-02-09 4:14 ` Peter Crosthwaite
2014-02-09 13:35 ` Mark Cave-Ayland
2014-02-14 14:54 ` Peter Crosthwaite
2014-02-17 12:50 ` Mark Cave-Ayland
2014-02-17 16:18 ` Bob Breuer [this message]
2014-02-09 14:41 ` Peter Maydell
2014-02-09 15:19 ` Mark Cave-Ayland
2014-02-09 15:33 ` Peter Maydell
2014-02-17 12:33 ` Mark Cave-Ayland
2014-02-09 15:10 ` Andreas Färber
2014-02-09 15:24 ` Mark Cave-Ayland
2014-02-09 15:39 ` Andreas Färber
2014-02-10 8:20 ` Paolo Bonzini
2014-02-17 12:43 ` Mark Cave-Ayland
2014-02-17 12:54 ` Paolo Bonzini
2014-02-08 16:38 ` [Qemu-devel] [PATCHv2 2/2] sun4m: Add Sun CG3 framebuffer initialisation function Mark Cave-Ayland
2014-02-09 15:32 ` Andreas Färber
2014-02-17 12:30 ` Mark Cave-Ayland
2014-02-19 21:23 ` Mark Cave-Ayland
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