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From: Florian Vaussard <florian.vaussard@epfl.ch>
To: Tony Lindgren <tony@atomide.com>, Tero Kristo <t-kristo@ti.com>
Cc: "Benoît Cousson" <bcousson@baylibre.com>,
	"Mike Turquette" <mturquette@linaro.org>,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/2] ARM: OMAP4: Fix gpmc_fck clock
Date: Sun, 23 Feb 2014 21:36:12 +0100	[thread overview]
Message-ID: <530A5BBC.90009@epfl.ch> (raw)
In-Reply-To: <20140221232323.GD5342@atomide.com>


On 02/22/2014 12:23 AM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [140220 01:54]:
>> On 02/19/2014 09:26 PM, Florian Vaussard wrote:
>>>
>>> On 02/19/2014 05:22 PM, Tero Kristo wrote:
>>>> On 02/19/2014 11:15 AM, Florian Vaussard wrote:
>>>>> Hello,
>>>>>
>>>>> Trying to get my SMSC9221 working on OMAP4 with DT,
>>>>> I faced a misconfigured gpmc_fck (dummy clock set to 0)
>>>>> resulting in serveral division-by-zero, misconfigured
>>>>> timings and driver lost in the La La Land.
>>>>>
>>>>> To solve this, patch 1 removes gpmc_fck from the dummy
>>>>> clocks, and patch 2 adds the gpmc_fck DT node and
>>>>> reference it from the gpmc node.
>>>>>
>>>>> Tested on DuoVero/Parlor (OMAP4430) with SMSC9221.
>>>>
>>>> I can't test GPMC myself, but other than that, this set looks good to go.
>>>>
>>>
>>> Thank you. Would you like more test coverage by other people? I would
>>> like to see this in -rc if possible, as it is needed to boot my OMAP4
>>> system.
>>
>> Well, I just think the driver clock change should be acked by
>> someone who knows gpmc better than me.
> 
> Hmm do we also need to fix this for other omaps? We at least have
> the following refrerences:
> 
> $ git grep dummy_ck drivers/ | grep -i gpmc
> drivers/clk/ti/clk-44xx.c:      DT_CLK("50000000.gpmc", "fck", "dummy_ck"),
> drivers/clk/ti/clk-54xx.c:      DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
> drivers/clk/ti/clk-7xx.c:       DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
> 

Yes, the same applies to OMAP5 and DRA7. For OMAP5, gpmc_fclk is
connected to L3MAIN2_L3_GICLK, which is a gated l3_iclk. For DRA7, I
have no idea, as the TRM is not public. Someone from  TI?

And I have no way to test this.

Cheers,
Florian

WARNING: multiple messages have this Message-ID (diff)
From: florian.vaussard@epfl.ch (Florian Vaussard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/2] ARM: OMAP4: Fix gpmc_fck clock
Date: Sun, 23 Feb 2014 21:36:12 +0100	[thread overview]
Message-ID: <530A5BBC.90009@epfl.ch> (raw)
In-Reply-To: <20140221232323.GD5342@atomide.com>


On 02/22/2014 12:23 AM, Tony Lindgren wrote:
> * Tero Kristo <t-kristo@ti.com> [140220 01:54]:
>> On 02/19/2014 09:26 PM, Florian Vaussard wrote:
>>>
>>> On 02/19/2014 05:22 PM, Tero Kristo wrote:
>>>> On 02/19/2014 11:15 AM, Florian Vaussard wrote:
>>>>> Hello,
>>>>>
>>>>> Trying to get my SMSC9221 working on OMAP4 with DT,
>>>>> I faced a misconfigured gpmc_fck (dummy clock set to 0)
>>>>> resulting in serveral division-by-zero, misconfigured
>>>>> timings and driver lost in the La La Land.
>>>>>
>>>>> To solve this, patch 1 removes gpmc_fck from the dummy
>>>>> clocks, and patch 2 adds the gpmc_fck DT node and
>>>>> reference it from the gpmc node.
>>>>>
>>>>> Tested on DuoVero/Parlor (OMAP4430) with SMSC9221.
>>>>
>>>> I can't test GPMC myself, but other than that, this set looks good to go.
>>>>
>>>
>>> Thank you. Would you like more test coverage by other people? I would
>>> like to see this in -rc if possible, as it is needed to boot my OMAP4
>>> system.
>>
>> Well, I just think the driver clock change should be acked by
>> someone who knows gpmc better than me.
> 
> Hmm do we also need to fix this for other omaps? We at least have
> the following refrerences:
> 
> $ git grep dummy_ck drivers/ | grep -i gpmc
> drivers/clk/ti/clk-44xx.c:      DT_CLK("50000000.gpmc", "fck", "dummy_ck"),
> drivers/clk/ti/clk-54xx.c:      DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
> drivers/clk/ti/clk-7xx.c:       DT_CLK(NULL, "gpmc_ck", "dummy_ck"),
> 

Yes, the same applies to OMAP5 and DRA7. For OMAP5, gpmc_fclk is
connected to L3MAIN2_L3_GICLK, which is a gated l3_iclk. For DRA7, I
have no idea, as the TRM is not public. Someone from  TI?

And I have no way to test this.

Cheers,
Florian

  reply	other threads:[~2014-02-23 20:36 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-19  9:15 [PATCH v2 0/2] ARM: OMAP4: Fix gpmc_fck clock Florian Vaussard
2014-02-19  9:15 ` Florian Vaussard
2014-02-19  9:15 ` [PATCH v2 1/2] CLK: TI: OMAP4: Remove gpmc_fck from dummy clocks Florian Vaussard
2014-02-19  9:15   ` Florian Vaussard
2014-02-19  9:15 ` [PATCH v2 2/2] ARM: DTS: OMAP4: Use l3_ick for the gpmc node Florian Vaussard
2014-02-19  9:15   ` Florian Vaussard
2014-02-19 16:22 ` [PATCH v2 0/2] ARM: OMAP4: Fix gpmc_fck clock Tero Kristo
2014-02-19 16:22   ` Tero Kristo
2014-02-19 19:26   ` Florian Vaussard
2014-02-19 19:26     ` Florian Vaussard
2014-02-20  9:51     ` Tero Kristo
2014-02-20  9:51       ` Tero Kristo
2014-02-21 23:23       ` Tony Lindgren
2014-02-21 23:23         ` Tony Lindgren
2014-02-23 20:36         ` Florian Vaussard [this message]
2014-02-23 20:36           ` Florian Vaussard
     [not found]     ` <20140223212309.22529.75068@quantum>
2014-02-24  5:44       ` Florian Vaussard
2014-02-24  5:44         ` Florian Vaussard
     [not found]         ` <20140225062615.22529.88499@quantum>
2014-02-25  8:10           ` Florian Vaussard
2014-02-25  8:10             ` Florian Vaussard
2014-02-26  0:05             ` Suman Anna
2014-02-26  0:05               ` Suman Anna
2014-02-26  5:11               ` Florian Vaussard
2014-02-26  5:11                 ` Florian Vaussard

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