* [PATCH v3 02/10] ARM: tegra: Hook up SDMMC3 power-supply on Venice2
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 03/10] ARM: tegra: Add Tegra124 host1x support Thierry Reding
` (8 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SDMMC3 interface is supplied with 1.8V by the PMICs LDO6.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-venice2.dts | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index cedf06416266..b0db6348827f 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -761,12 +761,10 @@
regulator-max-microvolt = <1200000>;
};
- ldo6 {
+ vddio_sdmmc3: ldo6 {
regulator-name = "+VDDIO_SDMMC3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
};
ldo7 {
@@ -928,6 +926,7 @@
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
status = "okay";
bus-width = <4>;
+ vmmc-supply = <&vddio_sdmmc3>;
};
sdhci@700b0600 {
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 03/10] ARM: tegra: Add Tegra124 host1x support
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-02-28 16:40 ` [PATCH v3 02/10] ARM: tegra: Hook up SDMMC3 power-supply on Venice2 Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 04/10] ARM: tegra: Add Tegra124 eDP support Thierry Reding
` (7 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The version of host1x on Tegra124 is largely compatible with that on
earlier Tegra generations. Some of the registers have moved around or
expanded to allow for more capability, so a separate compatible string
is still required.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 30a7377d5600..26dfe09e8410 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -9,6 +9,47 @@
compatible = "nvidia,tegra124";
interrupt-parent = <&gic>;
+ host1x@50000000 {
+ compatible = "nvidia,tegra124-host1x", "simple-bus";
+ reg = <0x50000000 0x00034000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
+ resets = <&tegra_car 28>;
+ reset-names = "host1x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ranges = <0x54000000 0x54000000 0x01000000>;
+
+ dc@54200000 {
+ compatible = "nvidia,tegra124-dc";
+ reg = <0x54200000 0x00040000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_DISP1>,
+ <&tegra_car TEGRA124_CLK_PLL_P>;
+ clock-names = "dc", "parent";
+ resets = <&tegra_car 27>;
+ reset-names = "dc";
+
+ nvidia,head = <0>;
+ };
+
+ dc@54240000 {
+ compatible = "nvidia,tegra124-dc";
+ reg = <0x54240000 0x00040000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_DISP2>,
+ <&tegra_car TEGRA124_CLK_PLL_P>;
+ clock-names = "dc", "parent";
+ resets = <&tegra_car 26>;
+ reset-names = "dc";
+
+ nvidia,head = <1>;
+ };
+ };
+
gic: interrupt-controller@50041000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 04/10] ARM: tegra: Add Tegra124 eDP support
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-02-28 16:40 ` [PATCH v3 02/10] ARM: tegra: Hook up SDMMC3 power-supply on Venice2 Thierry Reding
2014-02-28 16:40 ` [PATCH v3 03/10] ARM: tegra: Add Tegra124 host1x support Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 05/10] ARM: tegra: Enable eDP for Venice2 Thierry Reding
` (6 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SOR block on Tegra124 can be used standalone to drive LVDS panels or
used in conjunction with the DPAUX block to support eDP.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 26dfe09e8410..dd5330f01e13 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -48,6 +48,32 @@
nvidia,head = <1>;
};
+
+ sor@54540000 {
+ compatible = "nvidia,tegra124-sor";
+ reg = <0x54540000 0x00040000>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_SOR0>,
+ <&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
+ <&tegra_car TEGRA124_CLK_PLL_DP>,
+ <&tegra_car TEGRA124_CLK_CLK_M>;
+ clock-names = "sor", "parent", "dp", "safe";
+ resets = <&tegra_car 182>;
+ reset-names = "sor";
+ status = "disabled";
+ };
+
+ dpaux@545c0000 {
+ compatible = "nvidia,tegra124-dpaux";
+ reg = <0x545c0000 0x00040000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA124_CLK_DPAUX>,
+ <&tegra_car TEGRA124_CLK_PLL_DP>;
+ clock-names = "dpaux", "parent";
+ resets = <&tegra_car 181>;
+ reset-names = "dpaux";
+ status = "disabled";
+ };
};
gic: interrupt-controller@50041000 {
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 05/10] ARM: tegra: Enable eDP for Venice2
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (2 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 04/10] ARM: tegra: Add Tegra124 eDP support Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 06/10] ARM: tegra: Add Tegra124 USB support Thierry Reding
` (5 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the
Tegra124. The panel has an EDID to describe the video timings but needs
a few extra nodes to get the backlight to come up.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-venice2.dts | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index b0db6348827f..7ffef561d667 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -16,6 +16,20 @@
reg = <0x80000000 0x80000000>;
};
+ host1x@50000000 {
+ sor@54540000 {
+ status = "okay";
+
+ nvidia,dpaux = <&dpaux>;
+ nvidia,panel = <&panel>;
+ };
+
+ dpaux: dpaux@545c0000 {
+ vdd-supply = <&vdd_3v3_panel>;
+ status = "okay";
+ };
+ };
+
pinmux: pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
@@ -940,6 +954,17 @@
};
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+
+ enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ power-supply = <&vdd_led>;
+ pwms = <&pwm 1 1000000>;
+
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ };
+
clocks {
compatible = "simple-bus";
#address-cells = <1>;
@@ -965,6 +990,13 @@
};
};
+ panel: panel {
+ compatible = "lg,lp129qe", "simple-panel";
+
+ backlight = <&backlight>;
+ ddc-i2c-bus = <&dpaux>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 06/10] ARM: tegra: Add Tegra124 USB support
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (3 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 05/10] ARM: tegra: Enable eDP for Venice2 Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 07/10] ARM: tegra: Enable USB on Venice2 Thierry Reding
` (4 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The USB controllers on Tegra124 are backwards-compatible with those
found on Tegra30.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Changes in v3:
- add Tegra124 compatible strings to USB nodes
arch/arm/boot/dts/tegra124.dtsi | 99 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index dd5330f01e13..b1459844ef09 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -591,6 +591,105 @@
};
};
+ usb@7d000000 {
+ compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
+ reg = <0x7d000000 0x4000>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USBD>;
+ resets = <&tegra_car 22>;
+ reset-names = "usb";
+ nvidia,phy = <&phy1>;
+ status = "disabled";
+ };
+
+ phy1: usb-phy@7d000000 {
+ compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
+ reg = <0x7d000000 0x4000 0x7d000000 0x4000>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USBD>,
+ <&tegra_car TEGRA124_CLK_PLL_U>,
+ <&tegra_car TEGRA124_CLK_USBD>;
+ clock-names = "reg", "pll_u", "utmi-pads";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,idle-wait-delay = <17>;
+ nvidia,elastic-limit = <16>;
+ nvidia,term-range-adj = <6>;
+ nvidia,xcvr-setup = <9>;
+ nvidia,xcvr-lsfslew = <0>;
+ nvidia,xcvr-lsrslew = <3>;
+ nvidia,hssquelch-level = <2>;
+ nvidia,hsdiscon-level = <5>;
+ nvidia,xcvr-hsslew = <12>;
+ status = "disabled";
+ };
+
+ usb@7d004000 {
+ compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
+ reg = <0x7d004000 0x4000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USB2>;
+ resets = <&tegra_car 58>;
+ reset-names = "usb";
+ nvidia,phy = <&phy2>;
+ status = "disabled";
+ };
+
+ phy2: usb-phy@7d004000 {
+ compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
+ reg = <0x7d004000 0x4000 0x7d000000 0x4000>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USB2>,
+ <&tegra_car TEGRA124_CLK_PLL_U>,
+ <&tegra_car TEGRA124_CLK_USBD>;
+ clock-names = "reg", "pll_u", "utmi-pads";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,idle-wait-delay = <17>;
+ nvidia,elastic-limit = <16>;
+ nvidia,term-range-adj = <6>;
+ nvidia,xcvr-setup = <9>;
+ nvidia,xcvr-lsfslew = <0>;
+ nvidia,xcvr-lsrslew = <3>;
+ nvidia,hssquelch-level = <2>;
+ nvidia,hsdiscon-level = <5>;
+ nvidia,xcvr-hsslew = <12>;
+ status = "disabled";
+ };
+
+ usb@7d008000 {
+ compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
+ reg = <0x7d008000 0x4000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USB3>;
+ resets = <&tegra_car 59>;
+ reset-names = "usb";
+ nvidia,phy = <&phy3>;
+ status = "disabled";
+ };
+
+ phy3: usb-phy@7d008000 {
+ compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
+ reg = <0x7d008000 0x4000 0x7d000000 0x4000>;
+ phy_type = "utmi";
+ clocks = <&tegra_car TEGRA124_CLK_USB3>,
+ <&tegra_car TEGRA124_CLK_PLL_U>,
+ <&tegra_car TEGRA124_CLK_USBD>;
+ clock-names = "reg", "pll_u", "utmi-pads";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,idle-wait-delay = <17>;
+ nvidia,elastic-limit = <16>;
+ nvidia,term-range-adj = <6>;
+ nvidia,xcvr-setup = <9>;
+ nvidia,xcvr-lsfslew = <0>;
+ nvidia,xcvr-lsrslew = <3>;
+ nvidia,hssquelch-level = <2>;
+ nvidia,hsdiscon-level = <5>;
+ nvidia,xcvr-hsslew = <12>;
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 07/10] ARM: tegra: Enable USB on Venice2
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (4 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 06/10] ARM: tegra: Add Tegra124 USB support Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 08/10] ARM: tegra: Fix whitespace around '=' Thierry Reding
` (3 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
USB1 and USB3 are routed to two external connectors, while USB2 is used
for the integrated webcam.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-venice2.dts | 29 ++++++++++++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 7ffef561d667..ee92d912ed2c 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -763,7 +763,7 @@
ams,enable-tracking;
};
- ldo4 {
+ vdd_run_cam: ldo4 {
regulator-name = "+3.3V_RUN_CAM";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
@@ -954,6 +954,33 @@
};
};
+ usb@7d000000 {
+ status = "okay";
+ };
+
+ usb-phy@7d000000 {
+ status = "okay";
+ vbus-supply = <&vdd_usb1_vbus>;
+ };
+
+ usb@7d004000 {
+ status = "okay";
+ };
+
+ usb-phy@7d004000 {
+ status = "okay";
+ vbus-supply = <&vdd_run_cam>;
+ };
+
+ usb@7d008000 {
+ status = "okay";
+ };
+
+ usb-phy@7d008000 {
+ status = "okay";
+ vbus-supply = <&vdd_usb3_vbus>;
+ };
+
backlight: backlight {
compatible = "pwm-backlight";
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 08/10] ARM: tegra: Fix whitespace around '='
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (5 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 07/10] ARM: tegra: Enable USB on Venice2 Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 16:40 ` [PATCH v3 09/10] ARM: tegra: Rename as3722 node to pmic Thierry Reding
` (2 subsequent siblings)
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Equal signs should always be preceded and followed by a single space in
device tree files.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index ee92d912ed2c..8c36e4c47871 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -999,7 +999,7 @@
clk32k_in: clock@0 {
compatible = "fixed-clock";
- reg=<0>;
+ reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 09/10] ARM: tegra: Rename as3722 node to pmic
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (6 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 08/10] ARM: tegra: Fix whitespace around '=' Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
[not found] ` <1393605629-30514-9-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2014-02-28 16:40 ` [PATCH v3 10/10] ARM: tegra: Update default configuration Thierry Reding
2014-02-28 17:42 ` [PATCH v3 01/10] ARM: tegra: Overhaul Venice2 regulators Stephen Warren
9 siblings, 1 reply; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Device tree node name should reflect the kind of device rather than the
specific name of the device.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra124-venice2.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 8c36e4c47871..1ad686154286 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -8,7 +8,7 @@
compatible = "nvidia,venice2", "nvidia,tegra124";
aliases {
- rtc0 = "/i2c@7000d000/as3722@40";
+ rtc0 = "/i2c@7000d000/pmic@40";
rtc1 = "/rtc@7000e000";
};
@@ -617,7 +617,7 @@
status = "okay";
clock-frequency = <400000>;
- as3722: as3722@40 {
+ pmic: pmic@40 {
compatible = "ams,as3722";
reg = <0x40>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
@@ -1067,7 +1067,7 @@
regulator-name = "+3.3V_RUN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
@@ -1132,7 +1132,7 @@
regulator-name = "+3.3V_PANEL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
- gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_run>;
};
@@ -1148,7 +1148,7 @@
* controllers so that it can be enabled on demand.
*/
regulator-always-on;
- gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
+ gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_3v3_sys>;
};
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 10/10] ARM: tegra: Update default configuration
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (7 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 09/10] ARM: tegra: Rename as3722 node to pmic Thierry Reding
@ 2014-02-28 16:40 ` Thierry Reding
2014-02-28 17:42 ` [PATCH v3 01/10] ARM: tegra: Overhaul Venice2 regulators Stephen Warren
9 siblings, 0 replies; 12+ messages in thread
From: Thierry Reding @ 2014-02-28 16:40 UTC (permalink / raw)
To: Stephen Warren; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Enable USB_GSPCA to support the webcam on Venice2. While at it, change
USB_VIDEO_CLASS to =y so that it is built into the kernel image like the
majority of other drivers.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/configs/tegra_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index efcf15fb2008..b22b34472cc1 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -168,7 +168,8 @@ CONFIG_REGULATOR_TPS65910=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
-CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_USB_GSPCA=y
CONFIG_DRM=y
CONFIG_DRM_TEGRA=y
CONFIG_DRM_PANEL_SIMPLE=y
--
1.8.4.2
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v3 01/10] ARM: tegra: Overhaul Venice2 regulators
[not found] ` <1393605629-30514-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
` (8 preceding siblings ...)
2014-02-28 16:40 ` [PATCH v3 10/10] ARM: tegra: Update default configuration Thierry Reding
@ 2014-02-28 17:42 ` Stephen Warren
9 siblings, 0 replies; 12+ messages in thread
From: Stephen Warren @ 2014-02-28 17:42 UTC (permalink / raw)
To: Thierry Reding; +Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA
On 02/28/2014 09:40 AM, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> Some of the regulators and the relationships to other regulators are
> wrong. This commit attempts to rectify this by making them more similar
> to what the schematics contain. This starts by adding a +VDD_MUX supply
> that represents the 12V input and derives the main +3.3V_SYS and +5V_SYS
> supplies from that. The majority of the other regulators derive from one
> of those three.
>
> While at it, rename the regulators to match the names in the schematics
> to make them easier to match up.
I've applied patches 1-9 to Tegra's for-3.15/dt branch, and squashed
patch 10 into Tegra's for-3.15/defconfig branch.
^ permalink raw reply [flat|nested] 12+ messages in thread