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From: Josh Wu <josh.wu@atmel.com>
To: Herve Codina <Herve.CODINA@celad.com>,
	<linux-mtd@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Brian Norris <computersforpeace@gmail.com>
Subject: Re: [PATCH] Disable Subpage nand write when using Atmel PMECC
Date: Fri, 7 Mar 2014 11:59:46 +0800	[thread overview]
Message-ID: <53194432.50104@atmel.com> (raw)
In-Reply-To: <1393845329-18175-1-git-send-email-Herve.CODINA@celad.com>

Dear Herve

I add the Brian in the email, who is the maintainer of the mtd.

On 3/3/2014 7:15 PM, Herve Codina wrote:
> Crash detected on sam5d35 and its pmecc nand ecc controller.
>
> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> (nand_base.c) when we write a sub page.
> chip->ecc.hwctl function is not set when we are using PMECC controller.
> As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> order to disable sub page access in nand_write_page.
>
>
> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>

Acked-by: Josh Wu <josh.wu@atmel.com>

> ---
>   drivers/mtd/nand/atmel_nand.c |    1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 1f719e0..4ce181a 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
>   		goto err;
>   	}
>   
> +	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
>   	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
>   	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
>   

Best Regards,
Josh Wu

WARNING: multiple messages have this Message-ID (diff)
From: josh.wu@atmel.com (Josh Wu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] Disable Subpage nand write when using Atmel PMECC
Date: Fri, 7 Mar 2014 11:59:46 +0800	[thread overview]
Message-ID: <53194432.50104@atmel.com> (raw)
In-Reply-To: <1393845329-18175-1-git-send-email-Herve.CODINA@celad.com>

Dear Herve

I add the Brian in the email, who is the maintainer of the mtd.

On 3/3/2014 7:15 PM, Herve Codina wrote:
> Crash detected on sam5d35 and its pmecc nand ecc controller.
>
> The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
> (nand_base.c) when we write a sub page.
> chip->ecc.hwctl function is not set when we are using PMECC controller.
> As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
> order to disable sub page access in nand_write_page.
>
>
> Signed-off-by: Herve Codina <Herve.CODINA@celad.com>

Acked-by: Josh Wu <josh.wu@atmel.com>

> ---
>   drivers/mtd/nand/atmel_nand.c |    1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 1f719e0..4ce181a 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
>   		goto err;
>   	}
>   
> +	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
>   	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
>   	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
>   

Best Regards,
Josh Wu

  reply	other threads:[~2014-03-07  3:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-03 11:15 [PATCH] Disable Subpage nand write when using Atmel PMECC Herve Codina
2014-03-03 11:15 ` Herve Codina
2014-03-07  3:59 ` Josh Wu [this message]
2014-03-07  3:59   ` Josh Wu
2014-03-07  8:02   ` Brian Norris
2014-03-07  8:02     ` Brian Norris
2014-03-11  3:07     ` Josh Wu
2014-03-11  3:07       ` Josh Wu
2014-03-11  5:36       ` Brian Norris
2014-03-11  5:36         ` Brian Norris

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