From: srinivas.kandagatla@st.com (srinivas kandagatla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/5] pinctrl: st: Enhance the controller to manage unavailable registers
Date: Fri, 7 Mar 2014 11:26:49 +0000 [thread overview]
Message-ID: <5319ACF9.4040504@st.com> (raw)
In-Reply-To: <5319AD5C.7050301@st.com>
On 07/03/14 11:28, Maxime Coquelin wrote:
>>
>
> Problem is that "oe" and "pu" takes -1 in that patch, and these values
> will be passed directly to devm_regmap_field_alloc without any check.
>
> I propose to apply this patch before "pinctrl: st: add pinctrl support
> for the STiH407 SoC", and move stih407_flashdata as you recommend.
>
> Is it fine for you?
Am OK with re-ordering, This will also be good for git bisect... :-)
Thanks,
srini
>
> Thanks for the review,
> Maxime
WARNING: multiple messages have this Message-ID (diff)
From: srinivas kandagatla <srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>
To: Maxime Coquelin <maxime.coquelin-qxv4g6HH51o@public.gmane.org>,
Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
Stuart Menefy <stuart.menefy-qxv4g6HH51o@public.gmane.org>,
Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org
Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH v2 3/5] pinctrl: st: Enhance the controller to manage unavailable registers
Date: Fri, 7 Mar 2014 11:26:49 +0000 [thread overview]
Message-ID: <5319ACF9.4040504@st.com> (raw)
In-Reply-To: <5319AD5C.7050301-qxv4g6HH51o@public.gmane.org>
On 07/03/14 11:28, Maxime Coquelin wrote:
>>
>
> Problem is that "oe" and "pu" takes -1 in that patch, and these values
> will be passed directly to devm_regmap_field_alloc without any check.
>
> I propose to apply this patch before "pinctrl: st: add pinctrl support
> for the STiH407 SoC", and move stih407_flashdata as you recommend.
>
> Is it fine for you?
Am OK with re-ordering, This will also be good for git bisect... :-)
Thanks,
srini
>
> Thanks for the review,
> Maxime
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WARNING: multiple messages have this Message-ID (diff)
From: srinivas kandagatla <srinivas.kandagatla@st.com>
To: Maxime Coquelin <maxime.coquelin@st.com>,
Rob Landley <rob@landley.net>, Rob Herring <robh+dt@kernel.org>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Russell King <linux@arm.linux.org.uk>,
Stuart Menefy <stuart.menefy@st.com>,
Linus Walleij <linus.walleij@linaro.org>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kernel@stlinux.com>
Cc: <lee.jones@linaro.org>
Subject: Re: [PATCH v2 3/5] pinctrl: st: Enhance the controller to manage unavailable registers
Date: Fri, 7 Mar 2014 11:26:49 +0000 [thread overview]
Message-ID: <5319ACF9.4040504@st.com> (raw)
In-Reply-To: <5319AD5C.7050301@st.com>
On 07/03/14 11:28, Maxime Coquelin wrote:
>>
>
> Problem is that "oe" and "pu" takes -1 in that patch, and these values
> will be passed directly to devm_regmap_field_alloc without any check.
>
> I propose to apply this patch before "pinctrl: st: add pinctrl support
> for the STiH407 SoC", and move stih407_flashdata as you recommend.
>
> Is it fine for you?
Am OK with re-ordering, This will also be good for git bisect... :-)
Thanks,
srini
>
> Thanks for the review,
> Maxime
next prev parent reply other threads:[~2014-03-07 11:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-07 9:41 [PATCH v2 0/5] Add STiH407 SoC and reference board support Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
2014-03-07 9:41 ` [PATCH v2 1/5] ARM: STi: Add STiH407 SoC support Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
2014-03-07 9:41 ` [PATCH v2 2/5] pinctrl: st: add pinctrl support for the STiH407 SoC Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
2014-03-07 10:43 ` srinivas kandagatla
2014-03-07 10:43 ` srinivas kandagatla
2014-03-07 10:43 ` srinivas kandagatla
2014-03-07 9:41 ` [PATCH v2 3/5] pinctrl: st: Enhance the controller to manage unavailable registers Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
2014-03-07 10:37 ` srinivas kandagatla
2014-03-07 10:37 ` srinivas kandagatla
2014-03-07 10:37 ` srinivas kandagatla
2014-03-07 10:41 ` srinivas kandagatla
2014-03-07 10:41 ` srinivas kandagatla
2014-03-07 10:41 ` srinivas kandagatla
2014-03-07 11:28 ` Maxime Coquelin
2014-03-07 11:28 ` Maxime Coquelin
2014-03-07 11:28 ` Maxime Coquelin
2014-03-07 11:26 ` srinivas kandagatla [this message]
2014-03-07 11:26 ` srinivas kandagatla
2014-03-07 11:26 ` srinivas kandagatla
2014-03-07 9:41 ` [PATCH v2 4/5] ARM: dts: Add STiH407 SoC support Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
2014-03-07 9:41 ` [PATCH v2 5/5] ARM: dts: STiH407: Add B2120 board support Maxime COQUELIN
2014-03-07 9:41 ` Maxime COQUELIN
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