[Qemu-trivial] [PATCH 0/4] Support more than 255 cpus

[Qemu-trivial] [PATCH 0/4] Support more than 255 cpus

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

These series patches are trying to make Qemu support more than 255 CPUs. 
The max cpu number changed to 4096.

 Support more than 255 cpus: ACPI and APIC defines
 Support more than 255 cpus: max_cpus to 4096
 Support more than 255 cpus: max cpumask bit to 4096
 Support more than 255 cpus: runtime chec

 include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
 include/hw/i386/apic_internal.h    | 2 +-
 include/hw/i386/pc.h | 2 +-
 include/sysemu/sysemu.h | 2 +-
 hw/i386/acpi-build.c | 8 ++++----

[Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

These series patches are trying to make Qemu support more than 255 CPUs. 
The max cpu number changed to 4096.

 Support more than 255 cpus: ACPI and APIC defines
 Support more than 255 cpus: max_cpus to 4096
 Support more than 255 cpus: max cpumask bit to 4096
 Support more than 255 cpus: runtime chec

 include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
 include/hw/i386/apic_internal.h    | 2 +-
 include/hw/i386/pc.h | 2 +-
 include/sysemu/sysemu.h | 2 +-
 hw/i386/acpi-build.c | 8 ++++----

[Qemu-trivial] [PATCH 1/4] Support more than 255 cpus: ACPI and APIC defines

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

Change ACPI_CPU_HOTPLUG_ID_LIMIT from 256 to 4096;
Change MAX_APICS from 256 to 4096;

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
 include/hw/i386/apic_internal.h    | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/hw/acpi/cpu_hotplug_defs.h b/include/hw/acpi/cpu_hotplug_defs.h
index 9f33663..17381e6 100644
--- a/include/hw/acpi/cpu_hotplug_defs.h
+++ b/include/hw/acpi/cpu_hotplug_defs.h
@@ -21,10 +21,10 @@
 /* Limit for CPU arch IDs for CPU hotplug. All hotpluggable CPUs should
  * have CPUClass.get_arch_id() < ACPI_CPU_HOTPLUG_ID_LIMIT.
  */
-#define ACPI_CPU_HOTPLUG_ID_LIMIT 256
+#define ACPI_CPU_HOTPLUG_ID_LIMIT 4096
 
 /* 256 CPU IDs, 8 bits per entry: */
-#define ACPI_GPE_PROC_LEN 32
+#define ACPI_GPE_PROC_LEN ((ACPI_CPU_HOTPLUG_ID_LIMIT)/8)
 
 #define ICH9_CPU_HOTPLUG_IO_BASE 0x0CD8
 #define PIIX4_CPU_HOTPLUG_IO_BASE 0xaf00
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 70542a6..e21f30e 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -64,7 +64,7 @@
 #define VAPIC_ENABLE_BIT                0
 #define VAPIC_ENABLE_MASK               (1 << VAPIC_ENABLE_BIT)
 
-#define MAX_APICS 255
+#define MAX_APICS 4096
 
 typedef struct APICCommonState APICCommonState;
 
-- 
2.0.0-rc0

[Qemu-devel] [PATCH 1/4] Support more than 255 cpus: ACPI and APIC defines

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

Change ACPI_CPU_HOTPLUG_ID_LIMIT from 256 to 4096;
Change MAX_APICS from 256 to 4096;

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
 include/hw/i386/apic_internal.h    | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/hw/acpi/cpu_hotplug_defs.h b/include/hw/acpi/cpu_hotplug_defs.h
index 9f33663..17381e6 100644
--- a/include/hw/acpi/cpu_hotplug_defs.h
+++ b/include/hw/acpi/cpu_hotplug_defs.h
@@ -21,10 +21,10 @@
 /* Limit for CPU arch IDs for CPU hotplug. All hotpluggable CPUs should
  * have CPUClass.get_arch_id() < ACPI_CPU_HOTPLUG_ID_LIMIT.
  */
-#define ACPI_CPU_HOTPLUG_ID_LIMIT 256
+#define ACPI_CPU_HOTPLUG_ID_LIMIT 4096
 
 /* 256 CPU IDs, 8 bits per entry: */
-#define ACPI_GPE_PROC_LEN 32
+#define ACPI_GPE_PROC_LEN ((ACPI_CPU_HOTPLUG_ID_LIMIT)/8)
 
 #define ICH9_CPU_HOTPLUG_IO_BASE 0x0CD8
 #define PIIX4_CPU_HOTPLUG_IO_BASE 0xaf00
diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index 70542a6..e21f30e 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -64,7 +64,7 @@
 #define VAPIC_ENABLE_BIT                0
 #define VAPIC_ENABLE_MASK               (1 << VAPIC_ENABLE_BIT)
 
-#define MAX_APICS 255
+#define MAX_APICS 4096
 
 typedef struct APICCommonState APICCommonState;
 
-- 
2.0.0-rc0

[Qemu-trivial] [PATCH 2/4] Support more than 255 cpus: max_cpus to 4096

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

max_cpus from 255 to 4096. So the machine types can support up to 4096 cpus.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/hw/i386/pc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 9010246..8183141 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -411,6 +411,6 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
 #define PC_DEFAULT_MACHINE_OPTIONS \
     PC_COMMON_MACHINE_OPTIONS, \
     .hot_add_cpu = pc_hot_add_cpu, \
-    .max_cpus = 255
+    .max_cpus = 4096
 
 #endif
-- 
2.0.0-rc0

[Qemu-devel] [PATCH 2/4] Support more than 255 cpus: max_cpus to 4096

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

max_cpus from 255 to 4096. So the machine types can support up to 4096 cpus.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/hw/i386/pc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 9010246..8183141 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -411,6 +411,6 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
 #define PC_DEFAULT_MACHINE_OPTIONS \
     PC_COMMON_MACHINE_OPTIONS, \
     .hot_add_cpu = pc_hot_add_cpu, \
-    .max_cpus = 255
+    .max_cpus = 4096
 
 #endif
-- 
2.0.0-rc0

[Qemu-trivial] [PATCH 3/4] Support more than 255 cpus: max cpumask bit to 4096

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

Change MAX_CPUMASK_BITS from 255 to 4096.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/sysemu/sysemu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
index ba5c7f8..97961a6 100644
--- a/include/sysemu/sysemu.h
+++ b/include/sysemu/sysemu.h
@@ -139,7 +139,7 @@ extern QEMUClockType rtc_clock;
  *
  * Note that cpu->get_arch_id() may be larger than MAX_CPUMASK_BITS.
  */
-#define MAX_CPUMASK_BITS 255
+#define MAX_CPUMASK_BITS 4096
 
 extern int nb_numa_nodes;
 extern uint64_t node_mem[MAX_NODES];
-- 
2.0.0-rc0

[Qemu-devel] [PATCH 3/4] Support more than 255 cpus: max cpumask bit to 4096

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

Change MAX_CPUMASK_BITS from 255 to 4096.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 include/sysemu/sysemu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
index ba5c7f8..97961a6 100644
--- a/include/sysemu/sysemu.h
+++ b/include/sysemu/sysemu.h
@@ -139,7 +139,7 @@ extern QEMUClockType rtc_clock;
  *
  * Note that cpu->get_arch_id() may be larger than MAX_CPUMASK_BITS.
  */
-#define MAX_CPUMASK_BITS 255
+#define MAX_CPUMASK_BITS 4096
 
 extern int nb_numa_nodes;
 extern uint64_t node_mem[MAX_NODES];
-- 
2.0.0-rc0

[Qemu-trivial] [PATCH 4/4] Support more than 255 cpus: runtime check

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

There is some runtime check for max cpu count. Make them support 4096 cpus.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 hw/i386/acpi-build.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c98df88..5c3bf10 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -272,7 +272,7 @@ static void GCC_FMT_ATTR(2, 3)
 build_append_nameseg(GArray *array, const char *format, ...)
 {
     /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */
-    char s[] = "XXXX";
+    char s[] = "XXXXXX";
     int len;
     va_list args;
 
@@ -280,7 +280,7 @@ build_append_nameseg(GArray *array, const char *format, ...)
     len = vsnprintf(s, sizeof s, format, args);
     va_end(args);
 
-    assert(len == 4);
+    assert(len == 4 || len == 5 || len == 6);
     g_array_append_vals(array, s, len);
 }
 
@@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
     for (i = 0; i < count; i++) {
         GArray *target = build_alloc_array();
         build_append_nameseg(target, format, i);
-        assert(i < 256); /* Fits in 1 byte */
+        assert(i < 4096); /* Fits in 1 byte */
         build_append_notify_target_ifequal(method, target, i, 1);
         build_free_array(target);
     }
@@ -1006,7 +1006,7 @@ build_ssdt(GArray *table_data, GArray *linker,
 
     /* The current AML generator can cover the APIC ID range [0..255],
      * inclusive, for VCPU hotplug. */
-    QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
+    QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 4096);
     g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT);
 
     /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
-- 
2.0.0-rc0

[Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Li, Zhen-Hua]

From: "Li, ZhenHua" <zhen-hual@hp.com>

There is some runtime check for max cpu count. Make them support 4096 cpus.

Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
---
 hw/i386/acpi-build.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c98df88..5c3bf10 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -272,7 +272,7 @@ static void GCC_FMT_ATTR(2, 3)
 build_append_nameseg(GArray *array, const char *format, ...)
 {
     /* It would be nicer to use g_string_vprintf but it's only there in 2.22 */
-    char s[] = "XXXX";
+    char s[] = "XXXXXX";
     int len;
     va_list args;
 
@@ -280,7 +280,7 @@ build_append_nameseg(GArray *array, const char *format, ...)
     len = vsnprintf(s, sizeof s, format, args);
     va_end(args);
 
-    assert(len == 4);
+    assert(len == 4 || len == 5 || len == 6);
     g_array_append_vals(array, s, len);
 }
 
@@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
     for (i = 0; i < count; i++) {
         GArray *target = build_alloc_array();
         build_append_nameseg(target, format, i);
-        assert(i < 256); /* Fits in 1 byte */
+        assert(i < 4096); /* Fits in 1 byte */
         build_append_notify_target_ifequal(method, target, i, 1);
         build_free_array(target);
     }
@@ -1006,7 +1006,7 @@ build_ssdt(GArray *table_data, GArray *linker,
 
     /* The current AML generator can cover the APIC ID range [0..255],
      * inclusive, for VCPU hotplug. */
-    QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
+    QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 4096);
     g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT);
 
     /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
-- 
2.0.0-rc0

Re: [Qemu-trivial] [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Max Filippov]

On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
> From: "Li, ZhenHua" <zhen-hual@hp.com>
>
> There is some runtime check for max cpu count. Make them support 4096 cpus.
>
> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
> ---
>  hw/i386/acpi-build.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index c98df88..5c3bf10 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c

[...]

> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
>      for (i = 0; i < count; i++) {
>          GArray *target = build_alloc_array();
>          build_append_nameseg(target, format, i);
> -        assert(i < 256); /* Fits in 1 byte */
> +        assert(i < 4096); /* Fits in 1 byte */

The comment is no longer true.
Also the function build_append_notify_method is called with format argument
set to "CP%0.02X", looks like this should be changed to "CP%0.03X".

-- 
Thanks.
-- Max

Re: [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Max Filippov]

On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
> From: "Li, ZhenHua" <zhen-hual@hp.com>
>
> There is some runtime check for max cpu count. Make them support 4096 cpus.
>
> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
> ---
>  hw/i386/acpi-build.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index c98df88..5c3bf10 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c

[...]

> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
>      for (i = 0; i < count; i++) {
>          GArray *target = build_alloc_array();
>          build_append_nameseg(target, format, i);
> -        assert(i < 256); /* Fits in 1 byte */
> +        assert(i < 4096); /* Fits in 1 byte */

The comment is no longer true.
Also the function build_append_notify_method is called with format argument
set to "CP%0.02X", looks like this should be changed to "CP%0.03X".

-- 
Thanks.
-- Max

Re: [Qemu-trivial] [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Li, ZhenHua]

Maybe it should be 4 bytes for 4096 (0x1000).

On 05/13/2014 04:19 PM, Max Filippov wrote:
> On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>
>> There is some runtime check for max cpu count. Make them support 4096 cpus.
>>
>> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
>> ---
>>   hw/i386/acpi-build.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index c98df88..5c3bf10 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
> [...]
>
>> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
>>       for (i = 0; i < count; i++) {
>>           GArray *target = build_alloc_array();
>>           build_append_nameseg(target, format, i);
>> -        assert(i < 256); /* Fits in 1 byte */
>> +        assert(i < 4096); /* Fits in 1 byte */
> The comment is no longer true.
> Also the function build_append_notify_method is called with format argument
> set to "CP%0.02X", looks like this should be changed to "CP%0.03X".
>

Re: [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Li, ZhenHua]

Maybe it should be 4 bytes for 4096 (0x1000).

On 05/13/2014 04:19 PM, Max Filippov wrote:
> On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>
>> There is some runtime check for max cpu count. Make them support 4096 cpus.
>>
>> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
>> ---
>>   hw/i386/acpi-build.c | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>> index c98df88..5c3bf10 100644
>> --- a/hw/i386/acpi-build.c
>> +++ b/hw/i386/acpi-build.c
> [...]
>
>> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char *name,
>>       for (i = 0; i < count; i++) {
>>           GArray *target = build_alloc_array();
>>           build_append_nameseg(target, format, i);
>> -        assert(i < 256); /* Fits in 1 byte */
>> +        assert(i < 4096); /* Fits in 1 byte */
> The comment is no longer true.
> Also the function build_append_notify_method is called with format argument
> set to "CP%0.02X", looks like this should be changed to "CP%0.03X".
>

Re: [Qemu-trivial] [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Max Filippov]

On Thu, May 15, 2014 at 11:16 AM, Li, ZhenHua <zhen-hual@hp.com> wrote:
> Maybe it should be 4 bytes for 4096 (0x1000).

I'd say that 2 bytes should be enough, but actually I don't see
why anybody would care in that function how many bytes it is.

> On 05/13/2014 04:19 PM, Max Filippov wrote:
>>
>> On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
>>>
>>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>>
>>> There is some runtime check for max cpu count. Make them support 4096
>>> cpus.
>>>
>>> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
>>> ---
>>>   hw/i386/acpi-build.c | 8 ++++----
>>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>>> index c98df88..5c3bf10 100644
>>> --- a/hw/i386/acpi-build.c
>>> +++ b/hw/i386/acpi-build.c
>>
>> [...]
>>
>>> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char
>>> *name,
>>>       for (i = 0; i < count; i++) {
>>>           GArray *target = build_alloc_array();
>>>           build_append_nameseg(target, format, i);

BTW, build_append_nameseg also expects format string that makes a string of
4 characters, otherwise it asserts.

>>> -        assert(i < 256); /* Fits in 1 byte */
>>> +        assert(i < 4096); /* Fits in 1 byte */
>>
>> The comment is no longer true.
>> Also the function build_append_notify_method is called with format
>> argument
>> set to "CP%0.02X", looks like this should be changed to "CP%0.03X".

-- 
Thanks.
-- Max

Re: [Qemu-devel] [PATCH 4/4] Support more than 255 cpus: runtime check

[Max Filippov]

On Thu, May 15, 2014 at 11:16 AM, Li, ZhenHua <zhen-hual@hp.com> wrote:
> Maybe it should be 4 bytes for 4096 (0x1000).

I'd say that 2 bytes should be enough, but actually I don't see
why anybody would care in that function how many bytes it is.

> On 05/13/2014 04:19 PM, Max Filippov wrote:
>>
>> On Tue, May 13, 2014 at 11:09 AM, Li, Zhen-Hua <zhen-hual@hp.com> wrote:
>>>
>>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>>
>>> There is some runtime check for max cpu count. Make them support 4096
>>> cpus.
>>>
>>> Signed-off-by: Li, ZhenHua <zhen-hual@hp.com>
>>> ---
>>>   hw/i386/acpi-build.c | 8 ++++----
>>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>>> index c98df88..5c3bf10 100644
>>> --- a/hw/i386/acpi-build.c
>>> +++ b/hw/i386/acpi-build.c
>>
>> [...]
>>
>>> @@ -680,7 +680,7 @@ build_append_notify_method(GArray *device, const char
>>> *name,
>>>       for (i = 0; i < count; i++) {
>>>           GArray *target = build_alloc_array();
>>>           build_append_nameseg(target, format, i);

BTW, build_append_nameseg also expects format string that makes a string of
4 characters, otherwise it asserts.

>>> -        assert(i < 256); /* Fits in 1 byte */
>>> +        assert(i < 4096); /* Fits in 1 byte */
>>
>> The comment is no longer true.
>> Also the function build_append_notify_method is called with format
>> argument
>> set to "CP%0.02X", looks like this should be changed to "CP%0.03X".

-- 
Thanks.
-- Max

Re: [Qemu-trivial] [Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Andreas Färber]

Am 13.05.2014 09:09, schrieb Li, Zhen-Hua:
> From: "Li, ZhenHua" <zhen-hual@hp.com>
> 
> These series patches are trying to make Qemu support more than 255 CPUs. 
> The max cpu number changed to 4096.

This series is not trivial.
And it's not a bug fix either, so not stable material.

CC'ing Igor and Eduardo for review.

Regards,
Andreas

>  Support more than 255 cpus: ACPI and APIC defines
>  Support more than 255 cpus: max_cpus to 4096
>  Support more than 255 cpus: max cpumask bit to 4096
>  Support more than 255 cpus: runtime chec
> 
>  include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
>  include/hw/i386/apic_internal.h    | 2 +-
>  include/hw/i386/pc.h | 2 +-
>  include/sysemu/sysemu.h | 2 +-
>  hw/i386/acpi-build.c | 8 ++++----

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Re: [Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Andreas Färber]

Am 13.05.2014 09:09, schrieb Li, Zhen-Hua:
> From: "Li, ZhenHua" <zhen-hual@hp.com>
> 
> These series patches are trying to make Qemu support more than 255 CPUs. 
> The max cpu number changed to 4096.

This series is not trivial.
And it's not a bug fix either, so not stable material.

CC'ing Igor and Eduardo for review.

Regards,
Andreas

>  Support more than 255 cpus: ACPI and APIC defines
>  Support more than 255 cpus: max_cpus to 4096
>  Support more than 255 cpus: max cpumask bit to 4096
>  Support more than 255 cpus: runtime chec
> 
>  include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
>  include/hw/i386/apic_internal.h    | 2 +-
>  include/hw/i386/pc.h | 2 +-
>  include/sysemu/sysemu.h | 2 +-
>  hw/i386/acpi-build.c | 8 ++++----

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GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Jan Kiszka]

On 2014-05-13 09:09, Li, Zhen-Hua wrote:
> From: "Li, ZhenHua" <zhen-hual@hp.com>
> 
> These series patches are trying to make Qemu support more than 255 CPUs. 
> The max cpu number changed to 4096.
> 
>  Support more than 255 cpus: ACPI and APIC defines
>  Support more than 255 cpus: max_cpus to 4096
>  Support more than 255 cpus: max cpumask bit to 4096
>  Support more than 255 cpus: runtime chec
> 
>  include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
>  include/hw/i386/apic_internal.h    | 2 +-
>  include/hw/i386/pc.h | 2 +-
>  include/sysemu/sysemu.h | 2 +-
>  hw/i386/acpi-build.c | 8 ++++----

Don't we need x2APIC support to provide >255 CPUs? Where so you enforce
this, i.e. keep the restriction to 255 CPUs when we are not in KVM mode
with in-kernel APIC (the emulate APIC lacks x2APIC mode, unfortunately)?
But, wait, KVM only supports up to 255 VCPUs. So what are you targeting at?

Jan

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Re: [Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Li, ZhenHua]

Kernel's kvm support is not here.
x2APIC is needed, I will try to do that later.

On 05/13/2014 06:53 PM, Jan Kiszka wrote:
> On 2014-05-13 09:09, Li, Zhen-Hua wrote:
>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>
>> These series patches are trying to make Qemu support more than 255 CPUs.
>> The max cpu number changed to 4096.
>>
>>   Support more than 255 cpus: ACPI and APIC defines
>>   Support more than 255 cpus: max_cpus to 4096
>>   Support more than 255 cpus: max cpumask bit to 4096
>>   Support more than 255 cpus: runtime chec
>>
>>   include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
>>   include/hw/i386/apic_internal.h    | 2 +-
>>   include/hw/i386/pc.h | 2 +-
>>   include/sysemu/sysemu.h | 2 +-
>>   hw/i386/acpi-build.c | 8 ++++----
> Don't we need x2APIC support to provide >255 CPUs? Where so you enforce
> this, i.e. keep the restriction to 255 CPUs when we are not in KVM mode
> with in-kernel APIC (the emulate APIC lacks x2APIC mode, unfortunately)?
> But, wait, KVM only supports up to 255 VCPUs. So what are you targeting at?
>
> Jan
>

Re: [Qemu-devel] [PATCH 0/4] Support more than 255 cpus

[Jan Kiszka]

On 2014-05-15 09:16, Li, ZhenHua wrote:
> Kernel's kvm support is not here.
> x2APIC is needed, I will try to do that later.

x2APIC emulation can wait if KVM support is there. But we need at least
one of them before starting to think about raising the limit.

Jan

PS: Please don't top-post.

> 
> On 05/13/2014 06:53 PM, Jan Kiszka wrote:
>> On 2014-05-13 09:09, Li, Zhen-Hua wrote:
>>> From: "Li, ZhenHua" <zhen-hual@hp.com>
>>>
>>> These series patches are trying to make Qemu support more than 255 CPUs.
>>> The max cpu number changed to 4096.
>>>
>>>   Support more than 255 cpus: ACPI and APIC defines
>>>   Support more than 255 cpus: max_cpus to 4096
>>>   Support more than 255 cpus: max cpumask bit to 4096
>>>   Support more than 255 cpus: runtime chec
>>>
>>>   include/hw/acpi/cpu_hotplug_defs.h | 4 ++--
>>>   include/hw/i386/apic_internal.h    | 2 +-
>>>   include/hw/i386/pc.h | 2 +-
>>>   include/sysemu/sysemu.h | 2 +-
>>>   hw/i386/acpi-build.c | 8 ++++----
>> Don't we need x2APIC support to provide >255 CPUs? Where so you enforce
>> this, i.e. keep the restriction to 255 CPUs when we are not in KVM mode
>> with in-kernel APIC (the emulate APIC lacks x2APIC mode, unfortunately)?
>> But, wait, KVM only supports up to 255 VCPUs. So what are you
>> targeting at?
>>
>> Jan
>>
> 

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Corporate Competence Center Embedded Linux