From: zhangfei.gao@linaro.org (zhangfei)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] Documentation: Document Hisilicon hix5hd2 sata PHY
Date: Wed, 25 Jun 2014 20:41:26 +0800 [thread overview]
Message-ID: <53AAC376.7050705@linaro.org> (raw)
In-Reply-To: <201406251416.49561.arnd@arndb.de>
On 06/25/2014 08:16 PM, Arnd Bergmann wrote:
> On Wednesday 25 June 2014, Zhangfei Gao wrote:
>> From: Jiancheng Xue <xuejiancheng@huawei.com>
>>
>> Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>
> We have had a couple of PHY drivers that were initially meant to be
> single-purpose but then turned out to be for hardware that could
> be put into multiple modes (SATA, gbit ethernet, PCIe, ...). Are
> you sure that this particular device is SATA-only?
>
Yes, double confimed.
Hix5hd2 phy diver only support sata phy, in fact, current soc only
support synposis phy, since some internal physical link.
And hix5hd2 ethernet phy is already in hix5hd2_gmac.c.
No pcie support on hix5hd2 platfrom.
Thanks
WARNING: multiple messages have this Message-ID (diff)
From: zhangfei <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
haifeng.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
jchxue-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jiancheng Xue
<xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [PATCH v2 1/2] Documentation: Document Hisilicon hix5hd2 sata PHY
Date: Wed, 25 Jun 2014 20:41:26 +0800 [thread overview]
Message-ID: <53AAC376.7050705@linaro.org> (raw)
In-Reply-To: <201406251416.49561.arnd-r2nGTMty4D4@public.gmane.org>
On 06/25/2014 08:16 PM, Arnd Bergmann wrote:
> On Wednesday 25 June 2014, Zhangfei Gao wrote:
>> From: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>>
>> Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>
> We have had a couple of PHY drivers that were initially meant to be
> single-purpose but then turned out to be for hardware that could
> be put into multiple modes (SATA, gbit ethernet, PCIe, ...). Are
> you sure that this particular device is SATA-only?
>
Yes, double confimed.
Hix5hd2 phy diver only support sata phy, in fact, current soc only
support synposis phy, since some internal physical link.
And hix5hd2 ethernet phy is already in hix5hd2_gmac.c.
No pcie support on hix5hd2 platfrom.
Thanks
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: zhangfei <zhangfei.gao@linaro.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
mark.rutland@arm.com, haifeng.yan@linaro.org, jchxue@gmail.com,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Jiancheng Xue <xuejiancheng@huawei.com>
Subject: Re: [PATCH v2 1/2] Documentation: Document Hisilicon hix5hd2 sata PHY
Date: Wed, 25 Jun 2014 20:41:26 +0800 [thread overview]
Message-ID: <53AAC376.7050705@linaro.org> (raw)
In-Reply-To: <201406251416.49561.arnd@arndb.de>
On 06/25/2014 08:16 PM, Arnd Bergmann wrote:
> On Wednesday 25 June 2014, Zhangfei Gao wrote:
>> From: Jiancheng Xue <xuejiancheng@huawei.com>
>>
>> Add necessary binding documentation SATA PHY on Hisilicon hix5hd2 soc.
>>
>> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>
>> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
>
> We have had a couple of PHY drivers that were initially meant to be
> single-purpose but then turned out to be for hardware that could
> be put into multiple modes (SATA, gbit ethernet, PCIe, ...). Are
> you sure that this particular device is SATA-only?
>
Yes, double confimed.
Hix5hd2 phy diver only support sata phy, in fact, current soc only
support synposis phy, since some internal physical link.
And hix5hd2 ethernet phy is already in hix5hd2_gmac.c.
No pcie support on hix5hd2 platfrom.
Thanks
next prev parent reply other threads:[~2014-06-25 12:41 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 9:14 [PATCH v2 0/2] phy: add hix5hd2-sata-phy driver Zhangfei Gao
2014-06-25 9:14 ` Zhangfei Gao
2014-06-25 9:14 ` [PATCH v2 1/2] Documentation: Document Hisilicon hix5hd2 sata PHY Zhangfei Gao
2014-06-25 9:14 ` Zhangfei Gao
2014-06-25 12:16 ` Arnd Bergmann
2014-06-25 12:16 ` Arnd Bergmann
2014-06-25 12:41 ` zhangfei [this message]
2014-06-25 12:41 ` zhangfei
2014-06-25 12:41 ` zhangfei
2014-06-25 13:32 ` Arnd Bergmann
2014-06-25 13:32 ` Arnd Bergmann
2014-06-25 13:32 ` Arnd Bergmann
2014-06-26 13:48 ` zhangfei
2014-06-26 13:48 ` zhangfei
2014-06-26 13:48 ` zhangfei
2014-06-26 20:53 ` Arnd Bergmann
2014-06-26 20:53 ` Arnd Bergmann
2014-06-26 20:53 ` Arnd Bergmann
2014-06-27 3:37 ` zhangfei
2014-06-27 3:37 ` zhangfei
2014-06-27 7:50 ` Arnd Bergmann
2014-06-27 7:50 ` Arnd Bergmann
2014-06-27 7:50 ` Arnd Bergmann
2014-07-02 11:20 ` Kishon Vijay Abraham I
2014-07-02 11:20 ` Kishon Vijay Abraham I
2014-07-02 11:20 ` Kishon Vijay Abraham I
2014-06-25 9:14 ` [PATCH v2 2/2] phy: add hix5hd2-sata-phy driver Zhangfei Gao
2014-06-25 9:14 ` Zhangfei Gao
2014-07-02 11:25 ` Kishon Vijay Abraham I
2014-07-02 11:25 ` Kishon Vijay Abraham I
2014-07-02 11:25 ` Kishon Vijay Abraham I
2014-07-02 11:26 ` Kishon Vijay Abraham I
2014-07-02 11:26 ` Kishon Vijay Abraham I
2014-07-02 11:26 ` Kishon Vijay Abraham I
2014-07-02 15:19 ` zhangfei
2014-07-02 15:19 ` zhangfei
2014-07-02 15:19 ` zhangfei
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=53AAC376.7050705@linaro.org \
--to=zhangfei.gao@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.