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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Thu, 26 Jun 2014 02:47:15 +0000	[thread overview]
Message-ID: <53AB89B3.9020207@renesas.com> (raw)
In-Reply-To: <201406242159.55373.sergei.shtylyov@cogentembedded.com>

Hi Sergei,

(2014/06/25 2:59), Sergei Shtylyov wrote:
> From: Ben Dooks <ben.dooks@codethink.co.uk>
> 
> Add device nodes for the R8A7790 internal PCI bridge devices.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
> [Sergei: added several properties to the PCI bridge nodes]
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.

Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

> ---
> Changes in version 5:
> - added "device_type" and "ranges" properties to the PCI bridge nodes;
> - removed "0x" prefix from zero values in the "reg" properties.
> 
> Changes in version 4:
> - refreshed the patch.
> 
> Changes in version 3:
> - added interrupt-related properties to the PCI bridge nodes;
> - refreshed the patch.
> 
> Changes in version 2:
> - reworded summary (fixing typo) and changelog;
> - removed extra spaces before {;
> - refreshed the patch.
> 
>  arch/arm/boot/dts/r8a7790.dtsi |   60 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> Index: renesas/arch/arm/boot/dts/r8a7790.dtsi
> =================================> --- renesas.orig/arch/arm/boot/dts/r8a7790.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7790.dtsi
> @@ -930,6 +930,66 @@
>  		status = "disabled";
>  	};
>  
> +	pci0: pci@ee090000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee090000 0 0xc00>,
> +		      <0 0xee080000 0 0x1100>;
> +		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <0 0>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci1: pci@ee0b0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0b0000 0 0xc00>,
> +		      <0 0xee0a0000 0 0x1100>;
> +		interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <1 1>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci2: pci@ee0d0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0d0000 0 0xc00>,
> +		      <0 0xee0c0000 0 0x1100>;
> +		interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <2 2>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
>  	pciec: pcie@fe000000 {
>  		compatible = "renesas,pcie-r8a7790";
>  		reg = <0 0xfe000000 0 0x80000>;
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

WARNING: multiple messages have this Message-ID (diff)
From: yoshihiro.shimoda.uh@renesas.com (Yoshihiro Shimoda)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Thu, 26 Jun 2014 11:47:15 +0900	[thread overview]
Message-ID: <53AB89B3.9020207@renesas.com> (raw)
In-Reply-To: <201406242159.55373.sergei.shtylyov@cogentembedded.com>

Hi Sergei,

(2014/06/25 2:59), Sergei Shtylyov wrote:
> From: Ben Dooks <ben.dooks@codethink.co.uk>
> 
> Add device nodes for the R8A7790 internal PCI bridge devices.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
> [Sergei: added several properties to the PCI bridge nodes]
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.

Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

> ---
> Changes in version 5:
> - added "device_type" and "ranges" properties to the PCI bridge nodes;
> - removed "0x" prefix from zero values in the "reg" properties.
> 
> Changes in version 4:
> - refreshed the patch.
> 
> Changes in version 3:
> - added interrupt-related properties to the PCI bridge nodes;
> - refreshed the patch.
> 
> Changes in version 2:
> - reworded summary (fixing typo) and changelog;
> - removed extra spaces before {;
> - refreshed the patch.
> 
>  arch/arm/boot/dts/r8a7790.dtsi |   60 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> Index: renesas/arch/arm/boot/dts/r8a7790.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7790.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7790.dtsi
> @@ -930,6 +930,66 @@
>  		status = "disabled";
>  	};
>  
> +	pci0: pci at ee090000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee090000 0 0xc00>,
> +		      <0 0xee080000 0 0x1100>;
> +		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <0 0>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci1: pci at ee0b0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0b0000 0 0xc00>,
> +		      <0 0xee0a0000 0 0x1100>;
> +		interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <1 1>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci2: pci at ee0d0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0d0000 0 0xc00>,
> +		      <0 0xee0c0000 0 0x1100>;
> +		interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <2 2>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
>  	pciec: pcie at fe000000 {
>  		compatible = "renesas,pcie-r8a7790";
>  		reg = <0 0xfe000000 0 0x80000>;
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

WARNING: multiple messages have this Message-ID (diff)
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	"horms@verge.net.au" <horms@verge.net.au>,
	"linux-sh@vger.kernel.org" <linux-sh@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"pawel.moll@arm.com" <pawel.moll@arm.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
	"galak@codeaurora.org" <galak@codeaurora.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Cc: "magnus.damm@gmail.com" <magnus.damm@gmail.com>,
	"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"ben.dooks@codethink.co.uk" <ben.dooks@codethink.co.uk>
Subject: Re: [PATCH v5 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Thu, 26 Jun 2014 11:47:15 +0900	[thread overview]
Message-ID: <53AB89B3.9020207@renesas.com> (raw)
In-Reply-To: <201406242159.55373.sergei.shtylyov@cogentembedded.com>

Hi Sergei,

(2014/06/25 2:59), Sergei Shtylyov wrote:
> From: Ben Dooks <ben.dooks@codethink.co.uk>
> 
> Add device nodes for the R8A7790 internal PCI bridge devices.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
> [Sergei: added several properties to the PCI bridge nodes]
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Thank you for the patch!
I tested this patch on my lager board and a usb memory, and it works.

Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda

> ---
> Changes in version 5:
> - added "device_type" and "ranges" properties to the PCI bridge nodes;
> - removed "0x" prefix from zero values in the "reg" properties.
> 
> Changes in version 4:
> - refreshed the patch.
> 
> Changes in version 3:
> - added interrupt-related properties to the PCI bridge nodes;
> - refreshed the patch.
> 
> Changes in version 2:
> - reworded summary (fixing typo) and changelog;
> - removed extra spaces before {;
> - refreshed the patch.
> 
>  arch/arm/boot/dts/r8a7790.dtsi |   60 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> Index: renesas/arch/arm/boot/dts/r8a7790.dtsi
> ===================================================================
> --- renesas.orig/arch/arm/boot/dts/r8a7790.dtsi
> +++ renesas/arch/arm/boot/dts/r8a7790.dtsi
> @@ -930,6 +930,66 @@
>  		status = "disabled";
>  	};
>  
> +	pci0: pci@ee090000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee090000 0 0xc00>,
> +		      <0 0xee080000 0 0x1100>;
> +		interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <0 0>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci1: pci@ee0b0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0b0000 0 0xc00>,
> +		      <0 0xee0a0000 0 0x1100>;
> +		interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <1 1>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
> +	pci2: pci@ee0d0000 {
> +		compatible = "renesas,pci-r8a7790";
> +		device_type = "pci";
> +		clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
> +		reg = <0 0xee0d0000 0 0xc00>,
> +		      <0 0xee0c0000 0 0x1100>;
> +		interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
> +		status = "disabled";
> +
> +		bus-range = <2 2>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		#interrupt-cells = <1>;
> +		ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
> +		interrupt-map-mask = <0xff00 0 0 0x7>;
> +		interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
> +			      	 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
> +	};
> +
>  	pciec: pcie@fe000000 {
>  		compatible = "renesas,pcie-r8a7790";
>  		reg = <0 0xfe000000 0 0x80000>;
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

  parent reply	other threads:[~2014-06-26  2:47 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-24 17:57 [PATCH v5 0/2] Add R8A7790/Lager board PCI USB DT support Sergei Shtylyov
2014-06-24 17:57 ` Sergei Shtylyov
2014-06-24 17:57 ` Sergei Shtylyov
2014-06-24 17:59 ` [PATCH v5 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes Sergei Shtylyov
2014-06-24 17:59   ` Sergei Shtylyov
2014-06-24 17:59   ` Sergei Shtylyov
2014-06-24 18:11   ` Arnd Bergmann
2014-06-24 18:11     ` Arnd Bergmann
2014-06-24 18:11     ` Arnd Bergmann
2014-06-26  2:47   ` Yoshihiro Shimoda [this message]
2014-06-26  2:47     ` Yoshihiro Shimoda
2014-06-26  2:47     ` Yoshihiro Shimoda
2014-06-26  3:01     ` Magnus Damm
2014-06-26  3:01       ` Magnus Damm
2014-06-26  3:01       ` Magnus Damm
2014-06-26  3:37       ` Yoshihiro Shimoda
2014-06-26  3:37         ` Yoshihiro Shimoda
2014-06-26  3:37         ` Yoshihiro Shimoda
2014-06-26  3:53         ` Magnus Damm
2014-06-26  3:53           ` Magnus Damm
2014-06-26  3:53           ` Magnus Damm
2014-06-26 12:34         ` Sergei Shtylyov
2014-06-26 12:34           ` Sergei Shtylyov
2014-06-26 12:34           ` Sergei Shtylyov
2014-06-30  7:58           ` Yoshihiro Shimoda
2014-06-30  7:58             ` Yoshihiro Shimoda
2014-06-30  7:58             ` Yoshihiro Shimoda
2014-06-26 12:28       ` Sergei Shtylyov
2014-06-26 12:28         ` Sergei Shtylyov
2014-06-26 12:28         ` Sergei Shtylyov
2014-06-24 18:02 ` [PATCH v5 2/2] ARM: shmobile: lager: enable internal PCI Sergei Shtylyov
2014-06-24 18:02   ` Sergei Shtylyov
2014-06-24 18:02   ` Sergei Shtylyov
2014-06-26  2:48   ` Yoshihiro Shimoda
2014-06-26  2:48     ` Yoshihiro Shimoda
2014-06-26  2:48     ` Yoshihiro Shimoda
2014-06-27 23:56 ` [PATCH v5 0/2] Add R8A7790/Lager board PCI USB DT support Simon Horman
2014-06-27 23:56   ` Simon Horman
2014-06-27 23:56   ` Simon Horman
2014-06-27 23:56   ` Simon Horman
2014-06-27 23:56     ` Simon Horman
2014-06-27 23:56     ` Simon Horman

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