Re: [PATCH v2 3/4] soc/tegra: Initialize interrupt controller from DT

[Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]

On 06/27/2014 07:02 PM, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> Obtains the register ranges for the legacy interrupt controller from DT
> and provide hard-coded values as fallback.

> diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
> -	if (num_ictlrs > ARRAY_SIZE(ictlr_reg_base)) {
> -		WARN(1, "Too many (%d) interrupt controllers found. Maximum is %d.",
> -			num_ictlrs, ARRAY_SIZE(ictlr_reg_base));
> -		num_ictlrs = ARRAY_SIZE(ictlr_reg_base);
> +	if (num_ictlrs != max_ictlrs) {
> +		WARN(1, "Too many (%d) interrupt controllers found. Maximum is %u.",
> +		     num_ictlrs, max_ictlrs);

We should change that message to something more like:

Wrong number (%d) interrupt controllers found. Expected %u.

Feel free to make that a separate patch though.

> -	if (!of_have_populated_dt())
> -		gic_init(0, 29, distbase,
> -			IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
> +	if (!of_have_populated_dt()) {
> +		void __iomem *cpubase = ioremap_nocache(0x50040000, 0x2000);
> +		gic_init(0, 29, distbase, cpubase);
> +	}

That if will never fire these days. We should rip out that block sometime.