From: James Hogan <james.hogan@imgtec.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
kvm-devel <kvm@vger.kernel.org>, Gleb Natapov <gleb@redhat.com>,
Sanjay Lal <sanjayl@kymasys.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Christoffer Dall <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v5 00/12] KVM Support for MIPS32 Processors
Date: Mon, 14 Jul 2014 16:50:36 +0100 [thread overview]
Message-ID: <53C3FC4C.3090703@imgtec.com> (raw)
In-Reply-To: <CAFEAcA82JamuUyU3Tk2kfN6uP7vfaagMO3DKW5AxJbmZzymRNg@mail.gmail.com>
On 14/07/14 15:35, Peter Maydell wrote:
> On 14 July 2014 14:33, James Hogan <james.hogan@imgtec.com> wrote:
>> On 10/07/14 13:17, Peter Maydell wrote:
>>> More generally, there doesn't really seem to be provision in the
>>> KVM KVM_EXIT_MMIO API for returning "this access failed".
>>> I guess in theory userspace could do all the "figure out how
>>> to adjust CPU state to do exception entry and then run VCPU",
>>> but that seems like quite a lot of work which the kernel already
>>> knows how to do; is there some way to provide a simpler API
>>> that lets userspace just inform the kernel that it needs to
>>> fault the access?
>>
>> Indeed. Paolo's idea would work well I think. A data bus error exception
>> would likely be the only sensible error response required other than
>> ignoring writes or returning a garbage value for a read (which the
>> current KVM MMIO API already allows).
>
> I think we should make the API at least permit returning an
> (architecture-specific) error code to the kernel, rather than just
> a single boolean "failed" response. For instance on ARM the
> fault status registers include a single ExT bit for classifying
> the type of an external abort. (The meaning of the bit is
> IMPDEF; on the Cortex-A15 it can be used to distinguish
> AXI bus DECERR ("decode error", ie the interconnect doesn't
> have anything attached at that address) and SLVERR ("slave
> error", ie there was a device at that address but it chose to
> reject the transaction for some reason, eg unsupported
> transfer size, timeout, write to read-only location, FIFO
> overrun or just because the device was in a bad mood.)
Agreed (I wasn't suggesting a bool, just thinking out loud about how
mips would use that arch specific value :-) ).
Cheers
James
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: kvm-devel <kvm@vger.kernel.org>, Gleb Natapov <gleb@redhat.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Sanjay Lal <sanjayl@kymasys.com>,
Christoffer Dall <christoffer.dall@linaro.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH v5 00/12] KVM Support for MIPS32 Processors
Date: Mon, 14 Jul 2014 16:50:36 +0100 [thread overview]
Message-ID: <53C3FC4C.3090703@imgtec.com> (raw)
In-Reply-To: <CAFEAcA82JamuUyU3Tk2kfN6uP7vfaagMO3DKW5AxJbmZzymRNg@mail.gmail.com>
On 14/07/14 15:35, Peter Maydell wrote:
> On 14 July 2014 14:33, James Hogan <james.hogan@imgtec.com> wrote:
>> On 10/07/14 13:17, Peter Maydell wrote:
>>> More generally, there doesn't really seem to be provision in the
>>> KVM KVM_EXIT_MMIO API for returning "this access failed".
>>> I guess in theory userspace could do all the "figure out how
>>> to adjust CPU state to do exception entry and then run VCPU",
>>> but that seems like quite a lot of work which the kernel already
>>> knows how to do; is there some way to provide a simpler API
>>> that lets userspace just inform the kernel that it needs to
>>> fault the access?
>>
>> Indeed. Paolo's idea would work well I think. A data bus error exception
>> would likely be the only sensible error response required other than
>> ignoring writes or returning a garbage value for a read (which the
>> current KVM MMIO API already allows).
>
> I think we should make the API at least permit returning an
> (architecture-specific) error code to the kernel, rather than just
> a single boolean "failed" response. For instance on ARM the
> fault status registers include a single ExT bit for classifying
> the type of an external abort. (The meaning of the bit is
> IMPDEF; on the Cortex-A15 it can be used to distinguish
> AXI bus DECERR ("decode error", ie the interconnect doesn't
> have anything attached at that address) and SLVERR ("slave
> error", ie there was a device at that address but it chose to
> reject the transaction for some reason, eg unsupported
> transfer size, timeout, write to read-only location, FIFO
> overrun or just because the device was in a bad mood.)
Agreed (I wasn't suggesting a bool, just thinking out loud about how
mips would use that arch specific value :-) ).
Cheers
James
next prev parent reply other threads:[~2014-07-14 15:50 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-17 22:10 [PATCH v5 00/12] KVM Support for MIPS32 Processors James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 01/12] target-mips: Reset CPU timer consistently James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 02/12] hw/mips/cputimer: Don't start periodic timer in KVM mode James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 03/12] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 04/12] target-mips: get_physical_address: Add defines for segment bases James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 05/12] target-mips: get_physical_address: Add KVM awareness James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 06/12] kvm: Allow arch to set sigmask length James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 07/12] target-mips: kvm: Add main KVM support for MIPS James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 08/12] target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset() James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 09/12] hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 10/12] hw/mips: malta: Add KVM support James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-19 16:27 ` Aurelien Jarno
2014-06-19 16:27 ` [Qemu-devel] " Aurelien Jarno
2014-06-19 19:34 ` Sanjay Lal
2014-06-19 19:34 ` Sanjay Lal
2014-06-19 21:47 ` Aurelien Jarno
2014-06-19 21:47 ` Aurelien Jarno
2014-06-20 6:07 ` Paolo Bonzini
2014-06-20 6:07 ` [Qemu-devel] " Paolo Bonzini
2014-06-20 8:46 ` James Hogan
2014-06-20 8:46 ` James Hogan
2014-06-20 9:10 ` Aurelien Jarno
2014-06-20 9:10 ` Aurelien Jarno
2014-06-20 10:38 ` Paolo Bonzini
2014-06-20 10:38 ` Paolo Bonzini
2014-06-20 11:19 ` Aurelien Jarno
2014-06-20 11:19 ` Aurelien Jarno
2014-06-20 11:28 ` James Hogan
2014-06-20 11:28 ` James Hogan
2014-06-20 9:25 ` James Hogan
2014-06-20 9:25 ` James Hogan
2014-06-20 11:11 ` Paolo Bonzini
2014-06-20 11:11 ` Paolo Bonzini
2014-06-20 11:20 ` Aurelien Jarno
2014-06-20 11:20 ` [Qemu-devel] " Aurelien Jarno
2014-06-17 22:10 ` [PATCH v5 11/12] target-mips: Enable KVM support in build system James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-17 22:10 ` [PATCH v5 12/12] MAINTAINERS: Add entry for MIPS KVM James Hogan
2014-06-17 22:10 ` [Qemu-devel] " James Hogan
2014-06-18 15:00 ` [PATCH v5 00/12] KVM Support for MIPS32 Processors Paolo Bonzini
2014-06-18 15:00 ` [Qemu-devel] " Paolo Bonzini
2014-06-19 16:29 ` Aurelien Jarno
2014-06-19 16:29 ` [Qemu-devel] " Aurelien Jarno
2014-07-10 12:17 ` Peter Maydell
2014-07-10 12:17 ` Peter Maydell
2014-07-10 12:47 ` Paolo Bonzini
2014-07-10 12:47 ` Paolo Bonzini
2014-07-14 13:33 ` James Hogan
2014-07-14 13:33 ` James Hogan
2014-07-14 14:35 ` Peter Maydell
2014-07-14 14:35 ` Peter Maydell
2014-07-14 15:50 ` James Hogan [this message]
2014-07-14 15:50 ` James Hogan
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