From: "Emilio López" <emilio@elopez.com.ar>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>,
Hans de Goede <hdegoede@redhat.com>,
chris@printf.net, david.lanzendoerfer@o2s.ch,
ulf.hansson@linaro.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH 03/14] ARM: sunxi: sun5i: Enforce max frequency on PLL6
Date: Thu, 17 Jul 2014 13:19:34 -0300 [thread overview]
Message-ID: <53C7F796.2050303@elopez.com.ar> (raw)
In-Reply-To: <1405588134-2396-4-git-send-email-maxime.ripard@free-electrons.com>
Hi Maxime,
El 17/07/14 06:08, Maxime Ripard escribió:
> PLL6 out of reset is running at 2.4GHz, which is outside of its operating
> boundaries.
>
> Enforce its maximum frequency as set in the datasheet to make sure we stays
> within these bounds.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm/boot/dts/sun5i-a13.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
> index bf86e65dd167..de89edc5e5b3 100644
> --- a/arch/arm/boot/dts/sun5i-a13.dtsi
> +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
> @@ -97,6 +97,7 @@
> reg = <0x01c20028 0x4>;
> clocks = <&osc24M>;
> clock-output-names = "pll6_sata", "pll6_other", "pll6";
> + clock-max-frequency = <1200000000>;
> };
>
> /* dummy is 200M */
>
This patch itself is ok, but I'm not seeing so far where is
"clock-max-frequency" read from the DT and passed to the clock for later
verification. Did you leave that out by mistake when shuffling patches?
Cheers!
Emilio
WARNING: multiple messages have this Message-ID (diff)
From: emilio@elopez.com.ar (Emilio López)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/14] ARM: sunxi: sun5i: Enforce max frequency on PLL6
Date: Thu, 17 Jul 2014 13:19:34 -0300 [thread overview]
Message-ID: <53C7F796.2050303@elopez.com.ar> (raw)
In-Reply-To: <1405588134-2396-4-git-send-email-maxime.ripard@free-electrons.com>
Hi Maxime,
El 17/07/14 06:08, Maxime Ripard escribi?:
> PLL6 out of reset is running at 2.4GHz, which is outside of its operating
> boundaries.
>
> Enforce its maximum frequency as set in the datasheet to make sure we stays
> within these bounds.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> arch/arm/boot/dts/sun5i-a13.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
> index bf86e65dd167..de89edc5e5b3 100644
> --- a/arch/arm/boot/dts/sun5i-a13.dtsi
> +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
> @@ -97,6 +97,7 @@
> reg = <0x01c20028 0x4>;
> clocks = <&osc24M>;
> clock-output-names = "pll6_sata", "pll6_other", "pll6";
> + clock-max-frequency = <1200000000>;
> };
>
> /* dummy is 200M */
>
This patch itself is ok, but I'm not seeing so far where is
"clock-max-frequency" read from the DT and passed to the clock for later
verification. Did you leave that out by mistake when shuffling patches?
Cheers!
Emilio
next prev parent reply other threads:[~2014-07-17 16:19 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-17 9:08 [PATCH 00/14] clk: sunxi: Improve MMC clocks support Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 01/14] clk: Introduce new frequency boundaries properties Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 02/14] clk: sunxi: factors: Implement clock min and max frequencies Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 16:09 ` Emilio López
2014-07-17 16:09 ` Emilio López
2014-07-17 9:08 ` [PATCH 04/14] clk: introduce clk_set_phase function & callback Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 05/14] clk: Add a function to retrieve phase Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 08/14] ARM: sunxi: dt: Switch to the new mbus compatible Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 09/14] clk: sunxi: Move mod0 clock to a file of its own Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 12/14] clk: sunxi: mod0: Introduce MMC proper phase handling Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 13/14] mmc: sunxi: Convert MMC driver to the standard clock phase API Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-08-13 8:44 ` Ulf Hansson
2014-08-13 8:44 ` Ulf Hansson
[not found] ` <1405588134-2396-1-git-send-email-maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2014-07-17 9:08 ` [PATCH 03/14] ARM: sunxi: sun5i: Enforce max frequency on PLL6 Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 16:19 ` Emilio López [this message]
2014-07-17 16:19 ` Emilio López
2014-07-17 9:08 ` [PATCH 06/14] clk: sunxi: factors: Invert the probing logic Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 07/14] clk: sunxi: Introduce mbus compatible Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-08-25 14:17 ` Chen-Yu Tsai
2014-08-25 14:17 ` Chen-Yu Tsai
2014-08-25 15:18 ` Maxime Ripard
2014-08-25 15:18 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 10/14] clk: sunxi: Move mbus to mod0 file Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 11/14] ARM: sunxi: dt: Add sample and output mmc clocks Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-17 9:08 ` [PATCH 14/14] clk: sunxi: Remove custom phase function Maxime Ripard
2014-07-17 9:08 ` Maxime Ripard
2014-07-19 10:47 ` [PATCH 00/14] clk: sunxi: Improve MMC clocks support Hans de Goede
2014-07-19 10:47 ` Hans de Goede
2014-07-24 11:20 ` Maxime Ripard
2014-07-24 11:20 ` Maxime Ripard
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