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From: Jeffrey Deans <jeffrey.deans@imgtec.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	Markos Chandras <markos.chandras@imgtec.com>,
	<linux-mips@linux-mips.org>
Subject: Re: [PATCH 7/7] MIPS: GIC: Fix GICBIS macro
Date: Fri, 18 Jul 2014 08:54:22 +0100	[thread overview]
Message-ID: <53C8D2AE.3020300@imgtec.com> (raw)
In-Reply-To: <53C7C5E2.1020307@cogentembedded.com>

Hi Sergei,

On 17/07/14 13:47, Sergei Shtylyov wrote:
> Hello.
>
> On 07/17/2014 12:20 PM, Markos Chandras wrote:
>
>> From: Jeffrey Deans <jeffrey.deans@imgtec.com>
>
>> The GICBIS macro could update the GIC registers incorrectly, depending
>> on the data value passed in:
>
>> * Bits were only OR'd into the register data, so register fields could
>>    not be cleared.
>
>> * Bits were OR'd into the register data without masking the data to the
>>    correct field width, corrupting adjacent bits.
>
>> Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com>
>> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
>> ---
>>   arch/mips/include/asm/gic.h | 21 +++++++++++----------
>>   1 file changed, 11 insertions(+), 10 deletions(-)
>
>> diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
>> index 8b30befd99d6..3f20b2111d56 100644
>> --- a/arch/mips/include/asm/gic.h
>> +++ b/arch/mips/include/asm/gic.h
>> @@ -43,18 +43,17 @@
>>   #ifdef GICISBYTELITTLEENDIAN
>>   #define GICREAD(reg, data)    ((data) = (reg), (data) =
>> le32_to_cpu(data))
>>   #define GICWRITE(reg, data)    ((reg) = cpu_to_le32(data))
>> -#define GICBIS(reg, bits)            \
>> -    ({unsigned int data;            \
>> -        GICREAD(reg, data);        \
>> -        data |= bits;            \
>> -        GICWRITE(reg, data);        \
>> -    })
>> -
>>   #else
>>   #define GICREAD(reg, data)    ((data) = (reg))
>>   #define GICWRITE(reg, data)    ((reg) = (data))
>> -#define GICBIS(reg, bits)    ((reg) |= (bits))
>>   #endif
>> +#define GICBIS(reg, mask, bits)            \
>> +    do { u32 data;                \
>> +        GICREAD((reg), data);        \
>
>     Why () only around 'reg', not around 'data'?

Brackets aren't necessary around "data" because it is declared at the 
start of the "do" code block, so it can't expand to anything else within 
that scope.

>
>> +        data &= ~(mask);        \
>> +        data |= ((bits) & (mask));    \
>
>     Outer () not needed.

Agreed.

>
>> +        GICWRITE((reg), data);        \
>
>     Again, why no () around 'data'?
>
>> +    } while (0)

As above.

>
> WBR, Sergei
>

Thanks for reviewing!

Jeffrey

WARNING: multiple messages have this Message-ID (diff)
From: Jeffrey Deans <jeffrey.deans@imgtec.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	Markos Chandras <markos.chandras@imgtec.com>,
	linux-mips@linux-mips.org
Subject: Re: [PATCH 7/7] MIPS: GIC: Fix GICBIS macro
Date: Fri, 18 Jul 2014 08:54:22 +0100	[thread overview]
Message-ID: <53C8D2AE.3020300@imgtec.com> (raw)
Message-ID: <20140718075422.QAZCRDUgUP4NrjcLFewdPJtILkklkKlfCdGdAAaT8vM@z> (raw)
In-Reply-To: <53C7C5E2.1020307@cogentembedded.com>

Hi Sergei,

On 17/07/14 13:47, Sergei Shtylyov wrote:
> Hello.
>
> On 07/17/2014 12:20 PM, Markos Chandras wrote:
>
>> From: Jeffrey Deans <jeffrey.deans@imgtec.com>
>
>> The GICBIS macro could update the GIC registers incorrectly, depending
>> on the data value passed in:
>
>> * Bits were only OR'd into the register data, so register fields could
>>    not be cleared.
>
>> * Bits were OR'd into the register data without masking the data to the
>>    correct field width, corrupting adjacent bits.
>
>> Signed-off-by: Jeffrey Deans <jeffrey.deans@imgtec.com>
>> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
>> ---
>>   arch/mips/include/asm/gic.h | 21 +++++++++++----------
>>   1 file changed, 11 insertions(+), 10 deletions(-)
>
>> diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
>> index 8b30befd99d6..3f20b2111d56 100644
>> --- a/arch/mips/include/asm/gic.h
>> +++ b/arch/mips/include/asm/gic.h
>> @@ -43,18 +43,17 @@
>>   #ifdef GICISBYTELITTLEENDIAN
>>   #define GICREAD(reg, data)    ((data) = (reg), (data) =
>> le32_to_cpu(data))
>>   #define GICWRITE(reg, data)    ((reg) = cpu_to_le32(data))
>> -#define GICBIS(reg, bits)            \
>> -    ({unsigned int data;            \
>> -        GICREAD(reg, data);        \
>> -        data |= bits;            \
>> -        GICWRITE(reg, data);        \
>> -    })
>> -
>>   #else
>>   #define GICREAD(reg, data)    ((data) = (reg))
>>   #define GICWRITE(reg, data)    ((reg) = (data))
>> -#define GICBIS(reg, bits)    ((reg) |= (bits))
>>   #endif
>> +#define GICBIS(reg, mask, bits)            \
>> +    do { u32 data;                \
>> +        GICREAD((reg), data);        \
>
>     Why () only around 'reg', not around 'data'?

Brackets aren't necessary around "data" because it is declared at the 
start of the "do" code block, so it can't expand to anything else within 
that scope.

>
>> +        data &= ~(mask);        \
>> +        data |= ((bits) & (mask));    \
>
>     Outer () not needed.

Agreed.

>
>> +        GICWRITE((reg), data);        \
>
>     Again, why no () around 'data'?
>
>> +    } while (0)

As above.

>
> WBR, Sergei
>

Thanks for reviewing!

Jeffrey

  reply	other threads:[~2014-07-18  7:54 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-17  8:20 [PATCH 0/7] Misc GIC fixes Markos Chandras
2014-07-17  8:20 ` Markos Chandras
2014-07-17  8:20 ` [PATCH 1/7] MIPS: GIC: move GIC interrupt bitmap declarations Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17  8:20 ` [PATCH 2/7] MIPS: GIC: Move GIC_NUM_INTRS into platform irq.h Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17  8:20 ` [PATCH 3/7] MIPS: GIC: Remove GIC_FLAG_IPI Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17  8:20 ` [PATCH 4/7] MIPS: GIC: Prevent array overrun Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17  8:20 ` [PATCH 5/7] MIPS: GIC: Generalise check for pending interrupts Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17  8:20 ` [PATCH 6/7] MIPS: Malta: Fix dispatching of GIC interrupts Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-08-04 22:57   ` Florian Fainelli
2014-07-17  8:20 ` [PATCH 7/7] MIPS: GIC: Fix GICBIS macro Markos Chandras
2014-07-17  8:20   ` Markos Chandras
2014-07-17 12:47   ` Sergei Shtylyov
2014-07-18  7:54     ` Jeffrey Deans [this message]
2014-07-18  7:54       ` Jeffrey Deans
2014-07-18 10:05       ` Markos Chandras
2014-07-18 10:05         ` Markos Chandras
2014-07-18 18:05       ` Sergei Shtylyov
2014-08-07 22:20         ` Ralf Baechle

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