* [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards
@ 2014-07-10 19:59 ` Boris BREZILLON
0 siblings, 0 replies; 21+ messages in thread
From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
This patch removes a board specific hook for sama5d3xek boards from the
sama5d3 generic DT board file.
This hook (which register a phy fixup configuring board specific delays
in the ksz9021 ethernet phy) is now replaced by the appropriate DT
properties definitions in the sama5d3xcm.dtsi file.
Best Regards,
Boris
Changes since v2:
- define 2 phy nodes to handle Ronetix and Embest HW designs
Changes since v1:
- fix txc-skew-ps and rxc-skew-ps delays
- remove phy address info to handle Ronetix and Embest HW designs
Boris BREZILLON (2):
ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek
boards
ARM: at91: remove phy fixup for sama5d3xek boards
arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++
arch/arm/mach-at91/board-dt-sama5.c | 22 ----------------------
2 files changed, 30 insertions(+), 22 deletions(-)
--
1.8.3.2
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-10 19:59 ` Boris BREZILLON 0 siblings, 0 replies; 21+ messages in thread From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw) To: Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev, Boris BREZILLON Hello, This patch removes a board specific hook for sama5d3xek boards from the sama5d3 generic DT board file. This hook (which register a phy fixup configuring board specific delays in the ksz9021 ethernet phy) is now replaced by the appropriate DT properties definitions in the sama5d3xcm.dtsi file. Best Regards, Boris Changes since v2: - define 2 phy nodes to handle Ronetix and Embest HW designs Changes since v1: - fix txc-skew-ps and rxc-skew-ps delays - remove phy address info to handle Ronetix and Embest HW designs Boris BREZILLON (2): ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards ARM: at91: remove phy fixup for sama5d3xek boards arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- 2 files changed, 30 insertions(+), 22 deletions(-) -- 1.8.3.2 ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards 2014-07-10 19:59 ` Boris BREZILLON @ 2014-07-10 19:59 ` Boris BREZILLON -1 siblings, 0 replies; 21+ messages in thread From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw) To: linux-arm-kernel Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) and board specific timing configs. Atmel has two different HW designs for its CPU modules: the first one (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up resistor and PHYAD[1-2] to pull down resistors. As a result, Ronetix design will have its PHY available at address 0x1 and Embest design at 0x7. By defining both phys we're letting the phy core detect the one actually available on the MDIO bus. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> --- Florian, I dropped your Reviewed-by tag because this patch has slightly changed. arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index b0b1331..755369e 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -34,6 +34,36 @@ macb0: ethernet at f0028000 { phy-mode = "rgmii"; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy at 1 { + reg = <0x1>; + interrupt-parent = <&pioB>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + txen-skew-ps = <800>; + txc-skew-ps = <3000>; + rxdv-skew-ps = <400>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <400>; + rxd1-skew-ps = <400>; + rxd2-skew-ps = <400>; + rxd3-skew-ps = <400>; + }; + + ethernet-phy at 7 { + reg = <0x7>; + interrupt-parent = <&pioB>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + txen-skew-ps = <800>; + txc-skew-ps = <3000>; + rxdv-skew-ps = <400>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <400>; + rxd1-skew-ps = <400>; + rxd2-skew-ps = <400>; + rxd3-skew-ps = <400>; + }; }; pmc: pmc at fffffc00 { -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-10 19:59 ` Boris BREZILLON 0 siblings, 0 replies; 21+ messages in thread From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw) To: Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev, Boris BREZILLON Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) and board specific timing configs. Atmel has two different HW designs for its CPU modules: the first one (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up resistor and PHYAD[1-2] to pull down resistors. As a result, Ronetix design will have its PHY available at address 0x1 and Embest design at 0x7. By defining both phys we're letting the phy core detect the one actually available on the MDIO bus. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> --- Florian, I dropped your Reviewed-by tag because this patch has slightly changed. arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index b0b1331..755369e 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -34,6 +34,36 @@ macb0: ethernet@f0028000 { phy-mode = "rgmii"; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@1 { + reg = <0x1>; + interrupt-parent = <&pioB>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + txen-skew-ps = <800>; + txc-skew-ps = <3000>; + rxdv-skew-ps = <400>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <400>; + rxd1-skew-ps = <400>; + rxd2-skew-ps = <400>; + rxd3-skew-ps = <400>; + }; + + ethernet-phy@7 { + reg = <0x7>; + interrupt-parent = <&pioB>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + txen-skew-ps = <800>; + txc-skew-ps = <3000>; + rxdv-skew-ps = <400>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <400>; + rxd1-skew-ps = <400>; + rxd2-skew-ps = <400>; + rxd3-skew-ps = <400>; + }; }; pmc: pmc@fffffc00 { -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-11 1:47 ` Bo Shen 0 siblings, 0 replies; 21+ messages in thread From: Bo Shen @ 2014-07-11 1:47 UTC (permalink / raw) To: linux-arm-kernel Hi Boris, On 07/11/2014 03:59 AM, Boris BREZILLON wrote: > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> For this patch series, test OK on both Embest (sama5d34ek) and Ronetix (sama5d33ek). Tested-by: Bo Shen <voice.shen@atmel.com> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. > > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet at f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy at 1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy at 7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc at fffffc00 { > Best Regards, Bo Shen ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-11 1:47 ` Bo Shen 0 siblings, 0 replies; 21+ messages in thread From: Bo Shen @ 2014-07-11 1:47 UTC (permalink / raw) To: Boris BREZILLON, Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Pawel Moll, Ian Campbell, netdev-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Kumar Gala, David S. Miller, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Hi Boris, On 07/11/2014 03:59 AM, Boris BREZILLON wrote: > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> For this patch series, test OK on both Embest (sama5d34ek) and Ronetix (sama5d33ek). Tested-by: Bo Shen <voice.shen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. > > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet@f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy@1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy@7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc@fffffc00 { > Best Regards, Bo Shen -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-11 1:47 ` Bo Shen 0 siblings, 0 replies; 21+ messages in thread From: Bo Shen @ 2014-07-11 1:47 UTC (permalink / raw) To: Boris BREZILLON, Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: Mark Rutland, devicetree, Pawel Moll, Ian Campbell, netdev, linux-kernel, Rob Herring, Kumar Gala, David S. Miller, linux-arm-kernel Hi Boris, On 07/11/2014 03:59 AM, Boris BREZILLON wrote: > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> For this patch series, test OK on both Embest (sama5d34ek) and Ronetix (sama5d33ek). Tested-by: Bo Shen <voice.shen@atmel.com> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. > > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet@f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy@1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy@7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc@fffffc00 { > Best Regards, Bo Shen ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-11 1:47 ` Bo Shen 0 siblings, 0 replies; 21+ messages in thread From: Bo Shen @ 2014-07-11 1:47 UTC (permalink / raw) To: Boris BREZILLON, Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Pawel Moll, Ian Campbell, netdev-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Kumar Gala, David S. Miller, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Hi Boris, On 07/11/2014 03:59 AM, Boris BREZILLON wrote: > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> For this patch series, test OK on both Embest (sama5d34ek) and Ronetix (sama5d33ek). Tested-by: Bo Shen <voice.shen-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. > > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet@f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy@1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy@7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc@fffffc00 { > Best Regards, Bo Shen -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards 2014-07-10 19:59 ` Boris BREZILLON (?) @ 2014-07-18 14:21 ` Nicolas Ferre -1 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:21 UTC (permalink / raw) To: linux-arm-kernel On 10/07/2014 21:59, Boris BREZILLON : > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. Hi Florian, I would like to have your Ack on this one as we discussed this solution with you. Thanks, bye, > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet at f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy at 1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy at 7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc at fffffc00 { > -- Nicolas Ferre ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-18 14:21 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:21 UTC (permalink / raw) To: Florian Fainelli Cc: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev On 10/07/2014 21:59, Boris BREZILLON : > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. Hi Florian, I would like to have your Ack on this one as we discussed this solution with you. Thanks, bye, > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet@f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy@1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy@7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc@fffffc00 { > -- Nicolas Ferre ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-18 14:21 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:21 UTC (permalink / raw) To: Florian Fainelli Cc: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev On 10/07/2014 21:59, Boris BREZILLON : > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > and board specific timing configs. > > Atmel has two different HW designs for its CPU modules: the first one > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > resistor and PHYAD[1-2] to pull down resistors. > As a result, Ronetix design will have its PHY available at address 0x1 and > Embest design at 0x7. > By defining both phys we're letting the phy core detect the one actually > available on the MDIO bus. > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> > --- > > Florian, I dropped your Reviewed-by tag because this patch has slightly > changed. Hi Florian, I would like to have your Ack on this one as we discussed this solution with you. Thanks, bye, > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > index b0b1331..755369e 100644 > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > @@ -34,6 +34,36 @@ > > macb0: ethernet@f0028000 { > phy-mode = "rgmii"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethernet-phy@1 { > + reg = <0x1>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > + > + ethernet-phy@7 { > + reg = <0x7>; > + interrupt-parent = <&pioB>; > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > + txen-skew-ps = <800>; > + txc-skew-ps = <3000>; > + rxdv-skew-ps = <400>; > + rxc-skew-ps = <3000>; > + rxd0-skew-ps = <400>; > + rxd1-skew-ps = <400>; > + rxd2-skew-ps = <400>; > + rxd3-skew-ps = <400>; > + }; > }; > > pmc: pmc@fffffc00 { > -- Nicolas Ferre ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards 2014-07-18 14:21 ` Nicolas Ferre (?) (?) @ 2014-07-18 15:48 ` Florian Fainelli -1 siblings, 0 replies; 21+ messages in thread From: Florian Fainelli @ 2014-07-18 15:48 UTC (permalink / raw) To: Nicolas Ferre Cc: Jean-Christophe Plagniol-Villard, Kumar Gala, Rob Herring, Andrew Victor, David S. Miller, Ian Campbell, Alexandre Belloni, linux-kernel, Pawel Moll, Mark Rutland, Boris BREZILLON, linux-arm-kernel, netdev, devicetree [-- Attachment #1: Type: text/plain, Size: 3389 bytes --] On Jul 18, 2014 7:21 AM, "Nicolas Ferre" <nicolas.ferre@atmel.com> wrote: > > On 10/07/2014 21:59, Boris BREZILLON : > > Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) > > and board specific timing configs. > > > > Atmel has two different HW designs for its CPU modules: the first one > > (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors > > and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up > > resistor and PHYAD[1-2] to pull down resistors. > > As a result, Ronetix design will have its PHY available at address 0x1 and > > Embest design at 0x7. > > By defining both phys we're letting the phy core detect the one actually > > available on the MDIO bus. > > > > Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> > > --- > > > > Florian, I dropped your Reviewed-by tag because this patch has slightly > > changed. > > Hi Florian, > > I would like to have your Ack on this one as we discussed this solution > with you. Acked-by: Florian Fainelli <f.fainelli@gmail.com> > > Thanks, bye, > > > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi > > index b0b1331..755369e 100644 > > --- a/arch/arm/boot/dts/sama5d3xcm.dtsi > > +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi > > @@ -34,6 +34,36 @@ > > > > macb0: ethernet@f0028000 { > > phy-mode = "rgmii"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethernet-phy@1 { > > + reg = <0x1>; > > + interrupt-parent = <&pioB>; > > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > > + txen-skew-ps = <800>; > > + txc-skew-ps = <3000>; > > + rxdv-skew-ps = <400>; > > + rxc-skew-ps = <3000>; > > + rxd0-skew-ps = <400>; > > + rxd1-skew-ps = <400>; > > + rxd2-skew-ps = <400>; > > + rxd3-skew-ps = <400>; > > + }; > > + > > + ethernet-phy@7 { > > + reg = <0x7>; > > + interrupt-parent = <&pioB>; > > + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; > > + txen-skew-ps = <800>; > > + txc-skew-ps = <3000>; > > + rxdv-skew-ps = <400>; > > + rxc-skew-ps = <3000>; > > + rxd0-skew-ps = <400>; > > + rxd1-skew-ps = <400>; > > + rxd2-skew-ps = <400>; > > + rxd3-skew-ps = <400>; > > + }; > > }; > > > > pmc: pmc@fffffc00 { > > > > > -- > Nicolas Ferre [-- Attachment #2: Type: text/html, Size: 5111 bytes --] ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-21 17:44 ` Florian Fainelli 0 siblings, 0 replies; 21+ messages in thread From: Florian Fainelli @ 2014-07-21 17:44 UTC (permalink / raw) To: linux-arm-kernel 2014-07-18 7:21 GMT-07:00 Nicolas Ferre <nicolas.ferre@atmel.com>: > On 10/07/2014 21:59, Boris BREZILLON : >> Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) >> and board specific timing configs. >> >> Atmel has two different HW designs for its CPU modules: the first one >> (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors >> and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up >> resistor and PHYAD[1-2] to pull down resistors. >> As a result, Ronetix design will have its PHY available at address 0x1 and >> Embest design at 0x7. >> By defining both phys we're letting the phy core detect the one actually >> available on the MDIO bus. >> >> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> >> --- >> >> Florian, I dropped your Reviewed-by tag because this patch has slightly >> changed. > > Hi Florian, > > I would like to have your Ack on this one as we discussed this solution > with you. Acked-by: Florian Fainelli <f.fainelli@gmail.com> > > Thanks, bye, > > >> arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi >> index b0b1331..755369e 100644 >> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi >> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi >> @@ -34,6 +34,36 @@ >> >> macb0: ethernet at f0028000 { >> phy-mode = "rgmii"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + ethernet-phy at 1 { >> + reg = <0x1>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> + >> + ethernet-phy at 7 { >> + reg = <0x7>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> }; >> >> pmc: pmc at fffffc00 { >> > > > -- > Nicolas Ferre -- Florian ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-21 17:44 ` Florian Fainelli 0 siblings, 0 replies; 21+ messages in thread From: Florian Fainelli @ 2014-07-21 17:44 UTC (permalink / raw) To: Nicolas Ferre Cc: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree@vger.kernel.org, David S. Miller, netdev 2014-07-18 7:21 GMT-07:00 Nicolas Ferre <nicolas.ferre@atmel.com>: > On 10/07/2014 21:59, Boris BREZILLON : >> Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) >> and board specific timing configs. >> >> Atmel has two different HW designs for its CPU modules: the first one >> (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors >> and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up >> resistor and PHYAD[1-2] to pull down resistors. >> As a result, Ronetix design will have its PHY available at address 0x1 and >> Embest design at 0x7. >> By defining both phys we're letting the phy core detect the one actually >> available on the MDIO bus. >> >> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> >> --- >> >> Florian, I dropped your Reviewed-by tag because this patch has slightly >> changed. > > Hi Florian, > > I would like to have your Ack on this one as we discussed this solution > with you. Acked-by: Florian Fainelli <f.fainelli@gmail.com> > > Thanks, bye, > > >> arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi >> index b0b1331..755369e 100644 >> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi >> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi >> @@ -34,6 +34,36 @@ >> >> macb0: ethernet@f0028000 { >> phy-mode = "rgmii"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + ethernet-phy@1 { >> + reg = <0x1>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> + >> + ethernet-phy@7 { >> + reg = <0x7>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> }; >> >> pmc: pmc@fffffc00 { >> > > > -- > Nicolas Ferre -- Florian ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek boards @ 2014-07-21 17:44 ` Florian Fainelli 0 siblings, 0 replies; 21+ messages in thread From: Florian Fainelli @ 2014-07-21 17:44 UTC (permalink / raw) To: Nicolas Ferre Cc: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, David S. Miller, netdev 2014-07-18 7:21 GMT-07:00 Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>: > On 10/07/2014 21:59, Boris BREZILLON : >> Add ethernet-phy nodes and specify phy interrupt (connected to pin PB25) >> and board specific timing configs. >> >> Atmel has two different HW designs for its CPU modules: the first one >> (produced by Embest) is connecting PHYAD[0-2] pins to pull up resistors >> and the other one (produced by Ronetix) is connecting PHYAD0 to a pull up >> resistor and PHYAD[1-2] to pull down resistors. >> As a result, Ronetix design will have its PHY available at address 0x1 and >> Embest design at 0x7. >> By defining both phys we're letting the phy core detect the one actually >> available on the MDIO bus. >> >> Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> >> --- >> >> Florian, I dropped your Reviewed-by tag because this patch has slightly >> changed. > > Hi Florian, > > I would like to have your Ack on this one as we discussed this solution > with you. Acked-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > > Thanks, bye, > > >> arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi >> index b0b1331..755369e 100644 >> --- a/arch/arm/boot/dts/sama5d3xcm.dtsi >> +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi >> @@ -34,6 +34,36 @@ >> >> macb0: ethernet@f0028000 { >> phy-mode = "rgmii"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + ethernet-phy@1 { >> + reg = <0x1>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> + >> + ethernet-phy@7 { >> + reg = <0x7>; >> + interrupt-parent = <&pioB>; >> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; >> + txen-skew-ps = <800>; >> + txc-skew-ps = <3000>; >> + rxdv-skew-ps = <400>; >> + rxc-skew-ps = <3000>; >> + rxd0-skew-ps = <400>; >> + rxd1-skew-ps = <400>; >> + rxd2-skew-ps = <400>; >> + rxd3-skew-ps = <400>; >> + }; >> }; >> >> pmc: pmc@fffffc00 { >> > > > -- > Nicolas Ferre -- Florian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 2/2] ARM: at91: remove phy fixup for sama5d3xek boards 2014-07-10 19:59 ` Boris BREZILLON @ 2014-07-10 19:59 ` Boris BREZILLON -1 siblings, 0 replies; 21+ messages in thread From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw) To: linux-arm-kernel These board specific delays are now configured through micrel's specific DT bindings (see Documentation/devicetree/bindings/net/micrel-ksz9021.txt). Remove this phy fixup registration from sama5 DT machine file to keep it as generic as possible. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> --- arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- 1 file changed, 22 deletions(-) diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c index 075ec05..70b2504 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -46,30 +46,8 @@ static void __init at91_dt_init_irq(void) of_irq_init(irq_of_match); } -static int ksz9021rn_phy_fixup(struct phy_device *phy) -{ - int value; - - /* Set delay values */ - value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000; - phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value); - value = 0xF2F4; - phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value); - value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000; - phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value); - value = 0x2222; - phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value); - - return 0; -} - static void __init sama5_dt_device_init(void) { - if (of_machine_is_compatible("atmel,sama5d3xcm") && - IS_ENABLED(CONFIG_PHYLIB)) - phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, - ksz9021rn_phy_fixup); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 2/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-10 19:59 ` Boris BREZILLON 0 siblings, 0 replies; 21+ messages in thread From: Boris BREZILLON @ 2014-07-10 19:59 UTC (permalink / raw) To: Nicolas Ferre, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev, Boris BREZILLON These board specific delays are now configured through micrel's specific DT bindings (see Documentation/devicetree/bindings/net/micrel-ksz9021.txt). Remove this phy fixup registration from sama5 DT machine file to keep it as generic as possible. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> --- arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- 1 file changed, 22 deletions(-) diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c index 075ec05..70b2504 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -46,30 +46,8 @@ static void __init at91_dt_init_irq(void) of_irq_init(irq_of_match); } -static int ksz9021rn_phy_fixup(struct phy_device *phy) -{ - int value; - - /* Set delay values */ - value = MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW | 0x8000; - phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value); - value = 0xF2F4; - phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value); - value = MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW | 0x8000; - phy_write(phy, MICREL_KSZ9021_EXTREG_CTRL, value); - value = 0x2222; - phy_write(phy, MICREL_KSZ9021_EXTREG_DATA_WRITE, value); - - return 0; -} - static void __init sama5_dt_device_init(void) { - if (of_machine_is_compatible("atmel,sama5d3xcm") && - IS_ENABLED(CONFIG_PHYLIB)) - phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, - ksz9021rn_phy_fixup); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -- 1.8.3.2 ^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-18 14:24 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:24 UTC (permalink / raw) To: linux-arm-kernel On 10/07/2014 21:59, Boris BREZILLON : > Hello, > > This patch removes a board specific hook for sama5d3xek boards from the > sama5d3 generic DT board file. > > This hook (which register a phy fixup configuring board specific delays > in the ksz9021 ethernet phy) is now replaced by the appropriate DT > properties definitions in the sama5d3xcm.dtsi file. > > Best Regards, On the whole series: Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> > Changes since v2: > - define 2 phy nodes to handle Ronetix and Embest HW designs > > Changes since v1: > - fix txc-skew-ps and rxc-skew-ps delays > - remove phy address info to handle Ronetix and Embest HW designs > > Boris BREZILLON (2): > ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek > boards > ARM: at91: remove phy fixup for sama5d3xek boards > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- > 2 files changed, 30 insertions(+), 22 deletions(-) > -- Nicolas Ferre ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-18 14:24 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:24 UTC (permalink / raw) To: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree-u79uwXL29TY76Z2rM5mHXA, David S. Miller, netdev-u79uwXL29TY76Z2rM5mHXA On 10/07/2014 21:59, Boris BREZILLON : > Hello, > > This patch removes a board specific hook for sama5d3xek boards from the > sama5d3 generic DT board file. > > This hook (which register a phy fixup configuring board specific delays > in the ksz9021 ethernet phy) is now replaced by the appropriate DT > properties definitions in the sama5d3xcm.dtsi file. > > Best Regards, On the whole series: Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> > Changes since v2: > - define 2 phy nodes to handle Ronetix and Embest HW designs > > Changes since v1: > - fix txc-skew-ps and rxc-skew-ps delays > - remove phy address info to handle Ronetix and Embest HW designs > > Boris BREZILLON (2): > ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek > boards > ARM: at91: remove phy fixup for sama5d3xek boards > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- > 2 files changed, 30 insertions(+), 22 deletions(-) > -- Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-18 14:24 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:24 UTC (permalink / raw) To: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel, linux-kernel, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree, David S. Miller, netdev On 10/07/2014 21:59, Boris BREZILLON : > Hello, > > This patch removes a board specific hook for sama5d3xek boards from the > sama5d3 generic DT board file. > > This hook (which register a phy fixup configuring board specific delays > in the ksz9021 ethernet phy) is now replaced by the appropriate DT > properties definitions in the sama5d3xcm.dtsi file. > > Best Regards, On the whole series: Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> > Changes since v2: > - define 2 phy nodes to handle Ronetix and Embest HW designs > > Changes since v1: > - fix txc-skew-ps and rxc-skew-ps delays > - remove phy address info to handle Ronetix and Embest HW designs > > Boris BREZILLON (2): > ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek > boards > ARM: at91: remove phy fixup for sama5d3xek boards > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- > 2 files changed, 30 insertions(+), 22 deletions(-) > -- Nicolas Ferre ^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards @ 2014-07-18 14:24 ` Nicolas Ferre 0 siblings, 0 replies; 21+ messages in thread From: Nicolas Ferre @ 2014-07-18 14:24 UTC (permalink / raw) To: Boris BREZILLON, Jean-Christophe Plagniol-Villard, Alexandre Belloni, Andrew Victor, Florian Fainelli Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala, devicetree-u79uwXL29TY76Z2rM5mHXA, David S. Miller, netdev-u79uwXL29TY76Z2rM5mHXA On 10/07/2014 21:59, Boris BREZILLON : > Hello, > > This patch removes a board specific hook for sama5d3xek boards from the > sama5d3 generic DT board file. > > This hook (which register a phy fixup configuring board specific delays > in the ksz9021 ethernet phy) is now replaced by the appropriate DT > properties definitions in the sama5d3xcm.dtsi file. > > Best Regards, On the whole series: Acked-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org> > Changes since v2: > - define 2 phy nodes to handle Ronetix and Embest HW designs > > Changes since v1: > - fix txc-skew-ps and rxc-skew-ps delays > - remove phy address info to handle Ronetix and Embest HW designs > > Boris BREZILLON (2): > ARM: at91/dt: describe rgmii ethernet phy connected to sama5d3xek > boards > ARM: at91: remove phy fixup for sama5d3xek boards > > arch/arm/boot/dts/sama5d3xcm.dtsi | 30 ++++++++++++++++++++++++++++++ > arch/arm/mach-at91/board-dt-sama5.c | 22 ---------------------- > 2 files changed, 30 insertions(+), 22 deletions(-) > -- Nicolas Ferre -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2014-07-21 17:45 UTC | newest] Thread overview: 21+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-07-10 19:59 [PATCH v3 0/2] ARM: at91: remove phy fixup for sama5d3xek boards Boris BREZILLON 2014-07-10 19:59 ` Boris BREZILLON 2014-07-10 19:59 ` [PATCH v3 1/2] ARM: at91/dt: describe rgmii ethernet phy connected to " Boris BREZILLON 2014-07-10 19:59 ` Boris BREZILLON 2014-07-11 1:47 ` Bo Shen 2014-07-11 1:47 ` Bo Shen 2014-07-11 1:47 ` Bo Shen 2014-07-11 1:47 ` Bo Shen 2014-07-18 14:21 ` Nicolas Ferre 2014-07-18 14:21 ` Nicolas Ferre 2014-07-18 14:21 ` Nicolas Ferre 2014-07-18 15:48 ` Florian Fainelli 2014-07-21 17:44 ` Florian Fainelli 2014-07-21 17:44 ` Florian Fainelli 2014-07-21 17:44 ` Florian Fainelli 2014-07-10 19:59 ` [PATCH v3 2/2] ARM: at91: remove phy fixup for " Boris BREZILLON 2014-07-10 19:59 ` Boris BREZILLON 2014-07-18 14:24 ` [PATCH v3 0/2] " Nicolas Ferre 2014-07-18 14:24 ` Nicolas Ferre 2014-07-18 14:24 ` Nicolas Ferre 2014-07-18 14:24 ` Nicolas Ferre
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.